Liquid crystal display device

Claim 1

A liquid crystal display device comprising: a plurality of pixel elements arranged in a matrix of rows and columns, each pixel element comprising a transparent pixel electrode (1) and at least two thin film transistors (2,3) whose drain terminals (4,5) are commonly connected to the pixel electrode; a plurality of gate lines (G1 - Gm), each one line being arranged for each row or column of the matrix; and a plurality of groups of source lines (S1,S2; S3,S4;Sn,Sn+1), each group being arranged for each column or row of the matrix, each group comprising a number of source lines equal to the number of said thin film transistors of the pixel element, wherein: each pixel element is connected to a respective combination of one of said gate lines (G1) and one of said groups of source lines (S1,S2) by the gate terminals (8,9) of its said thin film transistors which are commonly connected to said one gate line (G1) and by the source terminals (6;7) of its said thin film transistors which are separately connected to the source lines (S1;S2) of said one group; and each group of source lines (S1,S2;S3,S4;Sn,Sn+1) lies to one side of the column or row of pixel elements to which it is connected.

Claim 4

A method of testing a liquid crystal display device, said device comprising a plurality of pixel elements, each including a transparent electrode (1) and at least first and second thin film transistors (2,3), the sources (6,7) of each of the first and second thin film transistors being separately connected to first and second source lines (S1,S2), their drains (4,5) being commonly connected to the transparent electrode, and their gates (8,9) being commonly connected to a gate line (G1) so that the first and second transistors provide a path interconnecting the first and second source lines when the transistors are in their conductive state, the method comprising the steps of: energizing said gate line (G1) to render the transistors (2,3) conductive; applying a voltage across said first and second source lines (S1,S2); measuring a current passing through said first and second source lines under the condition that at least one of said source lines is connected to ground through an amperemeter; and comparing the measured current with a predetermined value corresponding to said transistors in the conductive state.