EP0315424A2
Expired / Lapsed
EP
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Field effect transistor arrangement
Assignee: Marconi Electronic Devices Ltd
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Filing: 1988-11-02
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Granted: —
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Expires: 2008-11-02
Abstract
Abstract A field effect transistor suitable for analogue operation is formed as an island of epitaxial silicon on an insulating substrate. The silicon region underlying the f.e.t. channel region is electrically connected to the source region so as to stabilise its potential. By preventing the potential of the silicon region under the gate from floating an improved turn-on transfer characteristic is obtained, having a smoother and more predictable profile.
Inventors
- 👤 John Anthony Kerr
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 19:44
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6708
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
97 words
A field effect transistor arrangement including an island of epitaxial silicon formed on an electrically insulating substrate, a transistor having an n-type drain and n-type source, with the source being provided with adjacent p-type regions at the edges of the island adjacent to a gate electrode which controls the conductivity of a channel region linking the source and drain; and an electrically conductive layer overlying the source and said p-type regions so as to be in contact therewith and acting to electrically connect the source to that region of the epitaxial silicon lying under the gate electrode.
Claim 2
Dependent Claim
97 words
A field effect transistor arrangement including an island of epitaxial silicon formed on an electrically insulating substrate, a transistor having an n-type drain and n-type source, with the source being provided with adjacent p-type regions at the edges of the island adjacent to a gate electrode which controls the conductivity of a channel region linking the source and drain; and an electrically conductive layer overlying the source and said p-type regions so as to be in contact therewith and acting to electrically connect the source to that region of the epitaxial silicon lying under the gate electrode.
Claim 3
Dependent Claim
17 words
A transistor arrangement as claimed in Claim 1 and wherein the insulating substrate is formed of sapphire.
Claim 4
Dependent Claim
35 words
A transistor arrangement as claimed in Claim 1 or 2 and wherein a plurality of islands are present on a common electrically insulating substrate, each island of which is provided with a field effect transistor.
Claim 5
Dependent Claim
23 words
A transistor arrangement as claimed in Claim 1, 2 or 3 and wherein a single n-type source region is provided in each transistor.
Claim 6
Dependent Claim
54 words
A transistor arrangement as claimed in Claim 1, 2 or 3 and wherein the drain and gate electrodes of each transistor are relatively long and narrow, and the source is in the form of a plurality of discrete regions separated by p-type regions, with the source regions being electrically connected to the p-type regions.
References Cited (Backward Citations)
No citation records indexed.
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