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EP0312401A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor devices and method of manufacturing the same

Assignee: Toshiba Corp
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Filing: 1988-10-14
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Granted: —
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Expires: 2008-10-14
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Abstract

Abstract A semiconductor device which comprises a semiconductor substrate (1) having a surface orientation substantially in a {100}-orientation is provided. On the semiconductor substrate (1), plural steps (8, 9, 13a, 13b) formed in a direction deviated substantially from a <110>-direction by 5 degrees or more are formed. The steps, which are mesa and concave portions, are buried by plural semiconductor crystal layers (10, 14 - 16) grown by the use of MOCVD or the like. A method of manufacturing such a device is also provided.

Inventors

  • 👤 Kazuhiro Eguchi
  • 👤 Tetsuo Sadamasa
  • 👤 Hideto Furuyama
  • 👤 Yuzo Hirayama

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-03 21:20
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/27; H10P14/271; H01; H01S; H01S5/00; H01S5/20; H01S5/22; H01S5/2203; H01S5/227; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/40; H10D62/405; H10F; H10F30/00; H10F30/20; H10F30/21; H10F30/22; H10F30/223; H10H; H10H20/00; H10H20/01; H10H20/011; H10H20/013; H10P14/24; H10P14/29; H10P14/2901; H10P14/2907; H10P14/2909; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3418; H10P14/3421; H01S5/2201; H01S5/30; H01S5/32; H01S5/3202; H01S5/323; H01S5/3235; H01S5/32391; Y; Y10; Y10S; Y10S438/00; Y10S438/973

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 57 words
A semiconductor device comprising: a compound semiconductor substrate (1) having a surface orientation substantially in a {100}-orientation; and having at least one step (8), the or each step (8) being formed in a direction deviating from a <110>-direction by substantially 5 degrees or more; and a compound semiconductor layer (10) formed on said substrate having said step.
Claim 2
Dependent Claim 57 words
A semiconductor device comprising: a compound semiconductor substrate (1) having a surface orientation substantially in a {100}-orientation; and having at least one step (8), the or each step (8) being formed in a direction deviating from a <110>-direction by substantially 5 degrees or more; and a compound semiconductor layer (10) formed on said substrate having said step.
Claim 3
Dependent Claim 16 words
A semiconductor device as claimed in claim 1, wherein said step (8) constructs a mesa pattern.
Claim 4
Dependent Claim 36 words
A semiconductor device as claimed in claim 2, wherein said mesa pattern is formed in a direction deviated substantially from the <110>-direction by an angle in a range of about 5 degrees to about 40 degrees.
Claim 5
Dependent Claim 20 words
A semiconductor device as claimed in claim 1, wherein said step (8) has a thickness of 1 µm or more.
Claim 6
Dependent Claim 30 words
A semiconductor device as claimed in claim 1, wherein said step constructs a concave portion (13a) formed on said substrate surface, said concave portion having a semiconductor layer (14) therein.
Claim 7
Dependent Claim 102 words
A semiconductor device as claimed in claim 5, wherein said compound semiconductor layer includes a first semiconductor layer (14) having a junction plane being partially exposed to said substrate surface, a second semiconductor layer (15) having a side being in contact with said first semiconductor layer (14) and said second semiconductor layer (15 ) having a junction plane, an end of which being exposed to said substrate surface, and a third semiconductor layer (16) being in contact with the entire side of said second semiconductor layer (15), said third semiconductor layer (16) having a junction plane being exposed to said substrate surface.
Claim 8
Dependent Claim 29 words
A semiconductor device as claimed in claim 6, wherein the bottom portion of the first semiconductor layer (14) is partially exposed to the side of the second semiconductor layer.
Claim 9
Dependent Claim 32 words
A semiconductor device as claimed in claim 7, wherein said second semiconductor layer (15) is formed at a position deeper than said first semiconductor layer (14) with respect to said substrate surface.
Claim 10
Dependent Claim 42 words
A semiconductor device as claimed in claim 8, wherein said compound semiconductor substrate (21) includes high resistivity InP, said first semiconductor layer (24) includes n-type InP, said second semiconductor layer (25) includes InGaAsP, and said third semiconductor layer (26) includes p-type InP.
Claim 11
Independent Claim 76 words
A method of manufacturing semiconductor devices comprising the steps of: providing a compound semiconductor substrate (1) having a surface orientation substantially in a {100}-orientation; forming a step (8) on the surface of said compound semiconductor substrate (1); said step (8) having a side substantially in a direction deviated from a <110>-direction by 5 degrees or more; and forming a compound semiconductor layer (10), by use of a vapor phase growth method, on said semiconductor substrate (1).
Claim 12
Independent Claim 76 words
A method of manufacturing semiconductor devices comprising the steps of: providing a compound semiconductor substrate (1) having a surface orientation substantially in a {100}-orientation; forming a step (8) on the surface of said compound semiconductor substrate (1); said step (8) having a side substantially in a direction deviated from a <110>-direction by 5 degrees or more; and forming a compound semiconductor layer (10), by use of a vapor phase growth method, on said semiconductor substrate (1).
Claim 13
Dependent Claim 22 words
A method as claimed in claim 10, wherein said step of forming a step includes the step of forming a mesa pattern.
Claim 14
Dependent Claim 44 words
A method as claimed in claim 11, wherein said step of forming a mesa pattern includes the step of forming the same substantially in a direction deviated from the <100>-direction by an angle in a range of about 5 degrees to about 40 degrees.
Claim 15
Dependent Claim 19 words
A semiconductor device as claimed in claim 12, wherein the formed step is 1 µm or more in thickness.
Claim 16
Dependent Claim 26 words
A method as claimed in claim 10 or claim 13, wherein said step of forming said step includes the step of forming a concave portion (13a).
Claim 17
Independent Claim 223 words
A method of manufacturing semiconductor devices comprising the steps of: providing a high-resistivity compound semiconductor substrate; forming a first concave portion (13a) on the surface of said compound semiconductor substrate; forming a first compound semiconductor layer (14) within said concave portion by use of a vapor phase growing method until the surface of said first compound semiconductor layer (14) reaches the substrate surface; forming a second concave portion (13b) deeper than said first concave portion (13a), said second concave portion (13b) being formed in a portion of said first compound semiconductor layer (14 ); forming a second compound semiconductor layer (15) on the inner walls of said second concave portion (13b) by use of a vapor phase growing method so as to form a third concave portion (13b); and forming a third compound semiconductor layer (16 ) within said third concave portion (13b) by use of a vapor phase growing method until the surface of said third compound semiconductor layer (16) reaches said substrate surface; said step of providing said substrate including the step of limiting the substrate surface orientation substantially to a {100}-orientation; and said steps of forming said first through third concave portions including the steps of limiting the respective sides of said first through third concave portions substantially to a direction deviated from the <100>-direction by 5 degrees or more.
Claim 18
Independent Claim 223 words
A method of manufacturing semiconductor devices comprising the steps of: providing a high-resistivity compound semiconductor substrate; forming a first concave portion (13a) on the surface of said compound semiconductor substrate; forming a first compound semiconductor layer (14) within said concave portion by use of a vapor phase growing method until the surface of said first compound semiconductor layer (14) reaches the substrate surface; forming a second concave portion (13b) deeper than said first concave portion (13a), said second concave portion (13b) being formed in a portion of said first compound semiconductor layer (14 ); forming a second compound semiconductor layer (15) on the inner walls of said second concave portion (13b) by use of a vapor phase growing method so as to form a third concave portion (13b); and forming a third compound semiconductor layer (16 ) within said third concave portion (13b) by use of a vapor phase growing method until the surface of said third compound semiconductor layer (16) reaches said substrate surface; said step of providing said substrate including the step of limiting the substrate surface orientation substantially to a {100}-orientation; and said steps of forming said first through third concave portions including the steps of limiting the respective sides of said first through third concave portions substantially to a direction deviated from the <100>-direction by 5 degrees or more.
Claim 19
Dependent Claim 34 words
The method of claim 15, wherein the step of forming said first through third compound semiconductor layers (14-16) includes the step of forming said layers by the use of MOCVD (metalorganic chemical vapor deposition).
Claim 20
Dependent Claim 90 words
The method of claim 16, wherein the step of providing said compound semiconductor substrate includes the step of limiting said substrate to a compound semiconductor substrate (21) having InP, and the steps of forming said first through third compound semiconductor layers include the step of limiting said first layer (24) to a compound semiconductor layer having n-type InP, the step of limiting said second layer (25) to a compound semiconductor layer having InGaAsP, and the step of limiting said third layer (26) to a compound semiconductor layer having p-type InP.

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