Low power optoelectronic device and method

Claim 2

In a photosource/photodetector circuit having a load in which the photosource is switched on and off, a method of selectively varying load resistance comprising the steps of applying an active component in parallel with the resistive load, the active component being switchable between low impedance and high impedance states, switching the active component to a low impedance state when the photosource is off, and switching the active component to a high impedance state when the photosource is on.

Claim 3

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of minimising power consumption comprising the steps of energising the photosource for a preselected period such that light from the photosource impinges on the photodetector and charges the inherent parasitic capacitor of the photodetector, turning off the photosource, and after the photosource is turned off and before the inherent parasitic capacitor is discharged, reading the value of the output of the photodetector.

Claim 4

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of minimising power consumption comprising the steps of energising the photosource for a preselected period such that light from the photosource impinges on the photodetector and charges the inherent parasitic capacitor of the photodetector, turning off the photosource, and after the photosource is turned off and before the inherent parasitic capacitor is discharged, reading the value of the output of the photodetector.

Claim 5

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of creating digital hysteresis comprising the steps of setting a current sample value of the photodetector output, turning the photosource on so that light therefrom impinges on the photodetector and charges up the inherent parasitic capacitor, reading a first sample value of the photodetector output, waiting a preselected period of time representative of the difference between preselected first and second thresholds of a hysteresis loop, reading a second sample value of the photodetector output, testing the current sample value for a logical one, replacing the current sample value with the first sample value if the current sample is not a logical one, replacing the current sample value with the second sample value if the current sample is a logical one, repeating the foregoing steps.

Claim 6

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of creating digital hysteresis comprising the steps of setting a current sample value of the photodetector output, turning the photosource on so that light therefrom impinges on the photodetector and charges up the inherent parasitic capacitor, reading a first sample value of the photodetector output, waiting a preselected period of time representative of the difference between preselected first and second thresholds of a hysteresis loop, reading a second sample value of the photodetector output, testing the current sample value for a logical one, replacing the current sample value with the first sample value if the current sample is not a logical one, replacing the current sample value with the second sample value if the current sample is a logical one, repeating the foregoing steps.

Claim 7

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of selectively adjusting the output of the photodetector comprising the steps of setting a minimum time value equal to a predetermined worst case value, turning the photosource on for a period of time so that light therefrom impinges on the photodetector, initialising a timer, incrementing the timer, sampling the phototransistor output, testing the phototransistor output for a logical one, setting the minimum time value to the value of the timer if the phototransistor output is a logical one, incrementing the timer if the phototransistor output is not a logical one and the timer value is less than the minimum time value.

Claim 8

In a photosource/photodetector circuit having a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of selectively adjusting the output of the photodetector comprising the steps of setting a minimum time value equal to a predetermined worst case value, turning the photosource on for a period of time so that light therefrom impinges on the photodetector, initialising a timer, incrementing the timer, sampling the phototransistor output, testing the phototransistor output for a logical one, setting the minimum time value to the value of the timer if the phototransistor output is a logical one, incrementing the timer if the phototransistor output is not a logical one and the timer value is less than the minimum time value.

Claim 9

In a photosource/photodetector circuit have a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of selecting an apparent input threshold comprising the steps of connecting a voltage controlled avalanching device in series with the photodetector, connecting an active component switchable between low and high impedance states in parallel with the voltage controlled avalanching device, switching the active component to a low impedance state when the photosource is on, and to a high impedance state when the photosource is off.

Claim 10

In a photosource/photodetector circuit have a load in which the photosource is switched on and off and the photodetector has an output and includes inherent parasitic capacitor, the method of selecting an apparent input threshold comprising the steps of connecting a voltage controlled avalanching device in series with the photodetector, connecting an active component switchable between low and high impedance states in parallel with the voltage controlled avalanching device, switching the active component to a low impedance state when the photosource is on, and to a high impedance state when the photosource is off.

Claim 11

The invention of claim l in which the photosource is an LED and the photodetector is a phototransistor, and a plurality of such circuits are included within an electronic mouse.

Claim 12

The invention of claim incorporated into an electronic mouse in which the photosource is an LED and the photodetector is a phototransistor.

Claim 13

The invention of claim 4 further including the steps of energising the photosource for another minimum time value,and reading the phototransistor value as output.

Claim 14

The invention of claim 5 wherein the voltage controlled avalanching device is a zener diode, the photosource is an LED and the photodetector is a phototransistor.

Claim 15

The invention of claim 5 further including the steps of connecting an element switchable between low and high impedance states in parallel with the resistive load, and switching the switchable element to a high impedance state when the photosource is on, and to a low impedance state when the photosource is off.

Claim 16

In an electronic mouse having a plurality of LED/phototransistor pairs, each pair having a shutter therebetween and the phototransistor having an output and inherent parasitic capacitor and a load connected between the output and a reference, the method comprising the steps of selectively turning the LEDS on and off connecting the outputs each to a respective switchable input/output port of a microprocessor, selecting the respective input/output ports to be an input at least during the substantial majority of the time when the associated LED is on, selecting the respective input/output ports to be an output and causing the output pin of the I/O port to be a low impedance at least during the substantial majority of the time when the associated LED is off, causing the parasitic capacitor of each phototransistor to charge during the time the associated LED is on, turning the associated LED off, sampling the value of the respective outputs after the associated LED is turned off and before the inherent parasitic capacitor is discharged.

Claim 17

In an electronic mouse having a plurality of LED/phototransistor pairs, each pair having a shutter therebetween and the phototransistor having an output and inherent parasitic capacitor and a load connected between the output and a reference, the method comprising the steps of selectively turning the LEDS on and off connecting the outputs each to a respective switchable input/output port of a microprocessor, selecting the respective input/output ports to be an input at least during the substantial majority of the time when the associated LED is on, selecting the respective input/output ports to be an output and causing the output pin of the I/O port to be a low impedance at least during the substantial majority of the time when the associated LED is off, causing the parasitic capacitor of each phototransistor to charge during the time the associated LED is on, turning the associated LED off, sampling the value of the respective outputs after the associated LED is turned off and before the inherent parasitic capacitor is discharged.

Claim 18

A circuit comprising an LED, a phototransistor having parasitic capacitances, the LED and phototransistor being arranged so that light from the LED impinges on the phototransistor when the LED is on, means for switching the LED on and off, offset voltage means connected to the collector of the phototransistor for imposing an offset voltage, load means connected to the emitter of the phototransistor for loading the phototransistor, first switchable means having high impedance and low impedance states connected in parallel with the offset voltage means for selectively shunting the offset voltage means, and wherein the first switchable means is switched to the low impedance state when the LED is on, and the first switchable means is switched to the high impedance state when the LED is off.

Claim 19

A circuit comprising an LED, a phototransistor having parasitic capacitances, the LED and phototransistor being arranged so that light from the LED impinges on the phototransistor when the LED is on, means for switching the LED on and off, offset voltage means connected to the collector of the phototransistor for imposing an offset voltage, load means connected to the emitter of the phototransistor for loading the phototransistor, first switchable means having high impedance and low impedance states connected in parallel with the offset voltage means for selectively shunting the offset voltage means, and wherein the first switchable means is switched to the low impedance state when the LED is on, and the first switchable means is switched to the high impedance state when the LED is off.

Claim 20

The invention of claim 12 further including second switchable means having high impedance and low impedance states connected in parallel with the load means for selectively shunting the load means, and the second switchable means is switched to the high impedance state when the LED is on, and the second switchable means is switched to the low impedance state when the LED is off.