Semiconductor device having bipolar transistor with trench

Claim 2

A semiconductor device comprising a semiconductor substrate having a major surface, an element forming region and an isolation region surrounding said element forming region, an active region positioned in said element forming region, a trench formed in said element forming region between said active region and said isolation region and surrounding said active region, said trench having a bottom, a first side wall extending from said major surface to said bottom and abutted to said active region and a second side wall facing to said first side wall and abutted to said isolation region, a collector region of a transistor formed in said active region at an inward portion thereof separated from said major surface of said active region, an emitter region of said transistor formed in said major surface of said active region, a base region of said transistor formed in said active region, a collector electrode formed within a lower section of said trench, and a base electrode formed within an upper section of said trench.

Claim 3

A semiconductor device of Claim 1 further comprising an impurity region having the same conductivity type as said collector region and an impurity concentration higher than said collector region, said impurity region being formed in said active region, contacted to the bottom of said collector region and constituting an inward part of said first side wall of said trench in full circle, and a graft base region having the same conductivity type as said base region and an impurity concentration higher than said base region, said graft base region being electrically connected to said base region, formed at a periphery portion of said major surface of said active region and constituting an upper part of said first side wall of said trench in full circle.

Claim 4

A semiconductor device of Claim 2, in which said collector electride is contacted to said impurity region at a first contact portion, said first contact portion encircling a section of said impurity region in said active region and positioned in said inward part of said first side wall of said trench constituted by said impurity region, and said base electrode is contacted to said graft base region at a second contact portion, said second contact portion encirciling a section of said graft base region in said active region and positioned in said upper part of said first side wall of said trench constituted by said graft base region.

Claim 5

A semiconductor device of Claim 1, in which said first and second side walls of said trench extend from said major surface of said substrate to said bottom in substantially perpendicular to said major surface of said substrate, respectively.

Claim 6

A semiconductor device comprising a semiconductor substrate including a semiconductor body of a first conductivity type, a first impurity layer of a second conductivity type opposite to said first conductivity type formed on said semiconductor body and a second impurity layer of said second conductivity type formed on said first impurity layer, said first impurity layer having an impurity concentration higher than an impurity concentration of said second impurity layer and said second impurity region having a major surface of said semiconductor substrate; a trench formed in said semiconductor substrate from said major surface into said semiconductor body through said first and second impurity layers and surrounding an active region of said semiconductor substrate, said trench having a first side wall abutted to said active region, a second side wall facing to said first side wall, and a bottom; a base region of said first conductivity type formed in said second impurity layer of said active region of said semiconductor substrate from said major surface to a predetermined depth of said second impurity layer such that a remaining section of said second impurity layer between said base region and said first impurity layer serves as a collector region of said second conductivity type; an emitter region of said second conductivity type formed in said base region at a center part of said major surface of said active region; a graft base region of said first conductivity type having an impurity concentration higher than an impurity concentration of said base region, separated from said emitter region and surrounding said emitter region, said graft base region being formed at a periphery part of said major surface of said active region; a first insulating film formed on said first and second side walls and on said bottom of said trench except on an upper portion of said inner side wall and an inward portion of said first side wall, said upper portion of said first side wall free from said first insulating film being constituted by said graft base region and surrounding an upper section of said active region, and said inward portion of said first side wall free from said first insulating film being constituted by said first impurity layer and surrounding a section of said first impurity layer; a first polycrystalline silicon layer doped with impurities of said second conductivity type and formed on said first insulating film within said trench, said first polycrystalline silicon layer filling a lower section of said trench and contacted to said first impurity layer at said inward portion of said first side wall of said trench; a second insulating film formed on said first polycrystalline silicon layer within said trench; a second polycrystalline silicon layer doped with impurities of said first conductivity type, formed on said first and second insulating films within said trench and contacted to said graft base region at said upper portion of said first side wall of said trench; and a means for leading-out said first polycrystalline silicon layer.

Claim 7

A semiconductor device comprising a semiconductor substrate including a semiconductor body of a first conductivity type, a first impurity layer of a second conductivity type opposite to said first conductivity type formed on said semiconductor body and a second impurity layer of said second conductivity type formed on said first impurity layer, said first impurity layer having an impurity concentration higher than an impurity concentration of said second impurity layer and said second impurity region having a major surface of said semiconductor substrate; a trench formed in said semiconductor substrate from said major surface into said semiconductor body through said first and second impurity layers and surrounding an active region of said semiconductor substrate, said trench having a first side wall abutted to said active region, a second side wall facing to said first side wall, and a bottom; a base region of said first conductivity type formed in said second impurity layer of said active region of said semiconductor substrate from said major surface to a predetermined depth of said second impurity layer such that a remaining section of said second impurity layer between said base region and said first impurity layer serves as a collector region of said second conductivity type; an emitter region of said second conductivity type formed in said base region at a center part of said major surface of said active region; a graft base region of said first conductivity type having an impurity concentration higher than an impurity concentration of said base region, separated from said emitter region and surrounding said emitter region, said graft base region being formed at a periphery part of said major surface of said active region; a first insulating film formed on said first and second side walls and on said bottom of said trench except on an upper portion of said inner side wall and an inward portion of said first side wall, said upper portion of said first side wall free from said first insulating film being constituted by said graft base region and surrounding an upper section of said active region, and said inward portion of said first side wall free from said first insulating film being constituted by said first impurity layer and surrounding a section of said first impurity layer; a first polycrystalline silicon layer doped with impurities of said second conductivity type and formed on said first insulating film within said trench, said first polycrystalline silicon layer filling a lower section of said trench and contacted to said first impurity layer at said inward portion of said first side wall of said trench; a second insulating film formed on said first polycrystalline silicon layer within said trench; a second polycrystalline silicon layer doped with impurities of said first conductivity type, formed on said first and second insulating films within said trench and contacted to said graft base region at said upper portion of said first side wall of said trench; and a means for leading-out said first polycrystalline silicon layer.

Claim 8

A semiconductor device of Claim 5, in which said leading-out means includes a contact hole formed in said second polycrystalline silicon layer and in said second insulating film to expose a part of said first poly­crystalline silicon layer, a third insulating film formed on a side wall in said contact hole of said second polycrystalline silicon layer, a third polycrystalline silicon layer doped with impurities of said second conductivity type, and contacted to said part of said first polycrystalline silicon layer through said contact hole, and a metallic electrode formed on said third polycrystalline silicon layer.

Claim 9

A semiconductor device of Claim 5, in which said active region is a rectangular or square plane shape delineated by four straight edge lines by said first side wall of said trench.

Claim 10

A semiconductor device of Claim 5, in which said trench includes a wider part and narrow parts between said first and second side walls, and said leading-out means is provided in said wider part of said trench.