Patent US2065813A successfully refreshed from Google Patents.
EP0307844A2
Expired / Lapsed
EP
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Semiconductor integrated circuit having interconnection with improved design flexibility
Assignee: Fujitsu Ltd
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Filing: 1988-09-12
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Granted: —
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Expires: 2008-09-12
Abstract
Abstract A semiconductor integrated circuit is supplied with a power source voltage (VEE) to a circuit element forming layer (23a) thereof from a conductive layer (42) through a substrate (41, 41A, 41B, 41C) and a certain region (44, 24a, 44a) made of a semiconductor type identical to that of the substrate. The conductive layer is formed on a back surface of the substrate, and the certain region makes contact with a front surface of the substrate. The circuit element forming layer is provided on the front surface side of the substrate and connects to the certain region. Alternatively, a region (90A, 90B, 90C) may be provided to extend from the circuit element forming layer to the substrate so as to provide a conductive path for supplying the power source voltage from the back surface of the substrate.
Inventors
- 👤 Masayuki Kokado
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 13:23
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/20; H10W20/40; H10W20/41; H10W20/427; H10W70/00; H10W70/40; H10W70/464; H10W70/465; H10W72/00; H10W72/01; H10W72/015; H10W72/50; H10W72/90; H10W72/931; H10W72/932
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
175 words
A semiconductor integrated circuit comprising a substrate (41) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41); a first layer (43) of the first semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density; a second layer (23a) of a second semiconductor type formed on said first layer for forming circuit elements therein, than second semiconductor type being the other of the p-type and n-type semiconductors; and a region (44, 24a, 44a) of the first semiconductor type extending from a top surface of said second layer and reaching at least said first layer, said conductive layer, said first layer and said region forming a conductive path for supplying a power source voltage (V EE ) to the circuit elements in said second layer from the back surface of said substrate.
Claim 2
Dependent Claim
175 words
A semiconductor integrated circuit comprising a substrate (41) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41); a first layer (43) of the first semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density; a second layer (23a) of a second semiconductor type formed on said first layer for forming circuit elements therein, than second semiconductor type being the other of the p-type and n-type semiconductors; and a region (44, 24a, 44a) of the first semiconductor type extending from a top surface of said second layer and reaching at least said first layer, said conductive layer, said first layer and said region forming a conductive path for supplying a power source voltage (V EE ) to the circuit elements in said second layer from the back surface of said substrate.
Claim 3
Dependent Claim
66 words
A semiconductor integrated circuit as claimed in claim 1, characterized in that said region (44, 24a, 44a) has a first region (24a) of the first semiconductor type extending from the top surface of said second layer (23a) to a portion of said first layer (43), and a second region (44, 44a) of the first semiconductor type connected to said first region and reaching said substrate (41).
Claim 4
Dependent Claim
25 words
A semiconductor integrated circuit as claimed in claim 2, characterized in that said first region (24a) isolates the circuit elements in said second layer (23a).
Claim 5
Dependent Claim
39 words
A semiconductor integrated circuit as claimed in claim 1, characterized in that there is further provided an isolating region (81) for isolating the circuit elements in said second layer (23a), said isolating region being independent of said region (44a).
Claim 6
Dependent Claim
20 words
A semiconductor integrated circuit as claimed in claim 4, characterized in that said isolating region (81) constitutes a trench isolation.
Claim 7
Dependent Claim
46 words
A semiconductor integrated circuit as claimed in any of claims 1 to 5, characterized in that there is further provided one or a plurality of interconnections (31a, 32a) formed on said second layer (23a) and connecting to said region (44, 24a, 44a) and the circuit elements.
Claim 8
Dependent Claim
76 words
A semiconductor integrated circuit as claimed in claim 6, characterized in that said first semiconductor type is the p-type semiconductor, a first power source voltage (V EE ) is supplied from said conductive layer (42) and a second power source voltage (V CC ) is supplied from a side of said semiconductor integrated circuit provided with said first and second interconnections (31a, 32a), said first power source voltage being smaller than said second power source voltage.
Claim 9
Dependent Claim
77 words
A semiconductor integrated circuit as claimed in claim 6, characterized in that said first semiconductor type is the n-type semiconductor, a first power source voltage (V EE ) is supplied from said conductive layer (42) and a second power source voltage (V CC ) is supplied from a side of said semiconductor integrated circuit provided with said first and second interconnections (V CC ), said first power source voltage being larger than said second power source voltage.
Claim 10
Dependent Claim
31 words
A semiconductor integrated circuit as claimed in any of claims 1 to 8, characterized in that said second layer (23a) includes an emitter coupled logic circuit constituted by the circuit elements.
Claim 11
Dependent Claim
31 words
A semiconductor integrated circuit as claimed in any of claims 1 to 8, characterized in that said second layer (23a) includes a transistor transistor logic circuit constituted by the circuit elements.
Claim 12
Dependent Claim
101 words
A semiconductor integrated circuit as claimed in any of claims 1 to 5, 9 and 10, characterized in that there is further provided one or a plurality of interconnections (31a. 32a) formed on said second layer (23a) and connecting to said region (44, 24a, 44a) and the circuit elements, said circuit elements receiving a first power source voltage (V CC ) through said first and/or second interconnections which extend horizontally on said substrate (41), said circuit elements receiving a second power source voltage (V EE ) from said conductor layer (42) through said conductor path which extends vertically on said substrate.
Claim 13
Dependent Claim
44 words
A semiconductor integrated circuit as claimed in any of claims 1 to 11, characterized in that said substrate (41) has a resistivity of 0.1 Ωcm or less, and said first layer (43) has a resistivity in a range of 1 Ωcm to 30 Ωcm.
Claim 14
Dependent Claim
24 words
A semiconductor integrated circuit as claimed in any of claims 1 to 12, characterized in that said first layer (43) is an epitaxial layer.
Claim 15
Dependent Claim
28 words
A semiconductor integrated circuit as claimed in any of claims 1 to 13, characterized in that said region (44, 24a, 44a) is selectively formed on said substrate (41).
Claim 16
Dependent Claim
34 words
A semiconductor integrated circuit as claimed in any of claims 1 to 14, characterized in that a resistivity of said conductor path is variable depending on a cross sectional shape and impurity density thereof.
Claim 17
Dependent Claim
89 words
A semiconductor integrated circuit as claimed in any of claims 1 to 6 and 9 to 15, characterized in that there are further provided terminals (55, 56) provided on top of said semiconductor integrated circuit for signal input to and signal output from the circuit elements and for supplying a first power source voltage (V CC ) to the circuit elements, said first power source voltage being different from a second power source voltage (V EE ) which is supplied to the circuit elements from said conductor layer (42).
Claim 18
Dependent Claim
52 words
A semiconductor integrated circuit as claimed in claim 1, characterized in that there are further provided a package (51) on which said substrate (41) is mounted, and a metallized layer (53) provided on said stage and connected to said power source voltage, said conductive layer (42) making contact with said metallized layer.
Claim 19
Dependent Claim
159 words
A semiconductor integrated circuit comprising a substrate (41A) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41A); a first layer (43A) of the first semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density; a second layer (23a) of a second semiconductor type formed on said first layer for forming circuit elements therein, said second semiconductor type being the other of the p-type and n-type semiconductors; and a region (90A) extending from a top surface of said second layer and reaching said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said second layer from the back surface of said substrate.
Claim 20
Dependent Claim
159 words
A semiconductor integrated circuit comprising a substrate (41A) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41A); a first layer (43A) of the first semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density; a second layer (23a) of a second semiconductor type formed on said first layer for forming circuit elements therein, said second semiconductor type being the other of the p-type and n-type semiconductors; and a region (90A) extending from a top surface of said second layer and reaching said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said second layer from the back surface of said substrate.
Claim 21
Dependent Claim
48 words
A semiconductor integrated circuit as claimed in claim 18, characterized in that said region (90A) is made up of a groove (89), an oxide layer (91) formed on side surfaces of the groove, and a conductive filler material (92A) filling the groove, said groove reaching said substrate (41A).
Claim 22
Dependent Claim
34 words
A semiconductor integrated circuit as claimed in claim 19, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92A) being made of a polysilicon of the first semiconductor type.
Claim 23
Dependent Claim
29 words
A semiconductor integrated circuit as claimed in claim 19, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92A) being made of a metal.
Claim 24
Dependent Claim
159 words
A semiconductor integrated circuit comprising a substrate (41B) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41B); a first layer (43B) of a second semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density, said second semiconductor type being the other of the p-type and n-type semiconductors; a second layer (23a) of the first semiconductor type formed on said first layer for forming circuit elements therein; and a region (90B) extending from a top surface of said second layer and reaching said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said second layer from the back surface of said substrate.
Claim 25
Dependent Claim
159 words
A semiconductor integrated circuit comprising a substrate (41B) of a first semiconductor type having a first impurity density, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41B); a first layer (43B) of a second semiconductor type formed on a front surface of said substrate, said first layer having a second impurity density lower than the first impurity density, said second semiconductor type being the other of the p-type and n-type semiconductors; a second layer (23a) of the first semiconductor type formed on said first layer for forming circuit elements therein; and a region (90B) extending from a top surface of said second layer and reaching said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said second layer from the back surface of said substrate.
Claim 26
Dependent Claim
48 words
A semiconductor integrated circuit as claimed in claim 22, characterized in that said region (90B) is made up of a groove (89), an oxide layer (91) formed on side surfaces of the groove, and a conductive filler material (92B) filling the groove, said groove reaching said substrate (41B).
Claim 27
Dependent Claim
34 words
A semiconductor integrated circuit as claimed in claim 23, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (91) being made of a polysilicon of the first semiconductor type.
Claim 28
Dependent Claim
29 words
A semiconductor integrated circuit as claimed in claim 23, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (91) being made of a metal.
Claim 29
Dependent Claim
127 words
A semiconductor integrated circuit comprising a substrate (41C) of a first semiconductor type, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41C); an insulator layer (43a) formed on a front surface of said substrate; an element forming layer (23a) of the first semiconductor type formed on said insulator layer for forming circuit elements therein; and a region (90C) extending from a top surface of said element forming layer and reaching at least said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said element forming layer from the back surface of said substrate.
Claim 30
Dependent Claim
127 words
A semiconductor integrated circuit comprising a substrate (41C) of a first semiconductor type, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate (41C); an insulator layer (43a) formed on a front surface of said substrate; an element forming layer (23a) of the first semiconductor type formed on said insulator layer for forming circuit elements therein; and a region (90C) extending from a top surface of said element forming layer and reaching at least said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said element forming layer from the back surface of said substrate.
Claim 31
Dependent Claim
48 words
A semiconductor integrated circuit as claimed in claim 26, characterized in that said region (90C) is made up of a groove (89), an oxide layer (91) formed on side surfaces of the groove, and a conductive filler material (92C) filling the groove, said groove reaching said substrate (41C).
Claim 32
Dependent Claim
34 words
A semiconductor integrated circuit as claimed in claim 27, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92C) being made of a polysilicon of the first semiconductor type.
Claim 33
Dependent Claim
29 words
A semiconductor integrated circuit as claimed in claim 27, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92C) being made of a metal.
Claim 34
Dependent Claim
139 words
A semiconductor integrated circuit comprising a substrate (41C) of a first semiconductor type, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate; an insulator layer (43a) formed on a front surface of said substrate; an element forming layer (23a) of a second semiconductor type formed on said insulator layer for forming circuit elements therein, said second semiconductor type being the other of the p-type and n-type semiconductors; and a region (90C) extending from a top surface of said element forming layer and reaching at least said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said element forming layer from the back surface of said substrate.
Claim 35
Dependent Claim
139 words
A semiconductor integrated circuit comprising a substrate (41C) of a first semiconductor type, said first semiconductor type being one of p-type and n-type semiconductors, characterized in that there are provided: a conductive layer (42) formed on a back surface of said substrate; an insulator layer (43a) formed on a front surface of said substrate; an element forming layer (23a) of a second semiconductor type formed on said insulator layer for forming circuit elements therein, said second semiconductor type being the other of the p-type and n-type semiconductors; and a region (90C) extending from a top surface of said element forming layer and reaching at least said substrate, said conductive layer and said region forming a conductive path for supplying a power source voltage to the circuit elements in said element forming layer from the back surface of said substrate.
Claim 36
Dependent Claim
48 words
A semiconductor integrated circuit as claimed in claim 30, characterized in that said region (90C) is made up of a groove (89), an oxide layer (91) formed on side surfaces of the groove, and a conductive filler material (92C) filling the groove, said groove reaching said substrate (41C).
Claim 37
Dependent Claim
34 words
A semiconductor integrated circuit as claimed in claim 31, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92C) being made of a polysilicon of the first semiconductor type.
Claim 38
Dependent Claim
29 words
A semiconductor integrated circuit as claimed in claim 31, characterized in that said groove (89) has an approximate U-shape, said conductive filler material (92C) being made of a metal.
References Cited (Backward Citations)
No citation records indexed.
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