EP0305676A2 — CMOS off-chip driver circuit

Claim 1

Independent Claim 130 words

An off-chip driver circuit comprising a pull-up transistor (30), a pull-down transistor (22), voltage source means (28) for providing a supply voltage of a given magnitude, a transistor (32) connected between said voltage source means (28) and said pull-up transistor (30), an output terminal (24), said first transistor (32) and said pull-up transistor being serially connected between said output terminal (24) and said voltage source means (28), a second transistor (36) connected from a gate electrode of said first transistor (32) to a common point (B) between said first transistor (32) and said pull-up transistor (30), means for applying control voltages to the gate electrodes of said transistors, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.

Claim 2

Dependent Claim 130 words

An off-chip driver circuit comprising a pull-up transistor (30), a pull-down transistor (22), voltage source means (28) for providing a supply voltage of a given magnitude, a transistor (32) connected between said voltage source means (28) and said pull-up transistor (30), an output terminal (24), said first transistor (32) and said pull-up transistor being serially connected between said output terminal (24) and said voltage source means (28), a second transistor (36) connected from a gate electrode of said first transistor (32) to a common point (B) between said first transistor (32) and said pull-up transistor (30), means for applying control voltages to the gate electrodes of said transistors, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.

Claim 3

Dependent Claim 25 words

An off-chip driver circuit as set forth in claim 1 wherein said pull-up, first and second transistors (30, 32, 36) are P-channel field effect transistors.

Claim 4

Dependent Claim 39 words

An off-chip driver circuit as set forth in claim 2 further including a third transistor (26) disposed between said pull-down transistor (22) and said output terminal (24), said pull-down and third transistors (26, 22) being N-channel field effect transistors.

Claim 5

Dependent Claim 29 words

An off-chip driver circuit as set forth in claim 3 wherein a gate electrode of said third transistor (26) has applied thereto said supply voltage (VDD) of given magnitude.

Claim 6

Dependent Claim 59 words

An off-chip driver circuit as set forth in claim 2 further including an N-well (40), said pull-up, first and second transistors (30, 32, 36) being disposed within said N-well and a N-well bias P-channel field effect transistor (38) connected between said voltage source means (28) and said N-well (40) with a gate electrode connected to said output terminal (24).

Claim 7

Dependent Claim 229 words

A CMOS off-chip driver circuit comprising voltage source means (28) for providing a supply voltage of a given magnitude, a data output terminal (24), first, second and third P-channel field effect transistors (30, 32, 36) each having a gate electrode, said first or pull-up transistor (30) and said second transistor (32) being serially connected between said voltage source means (28) and said data output terminal (24) with the source of said second transistor (32) being connected to said voltage source means (28) and said third transistor (36) being connected from the gate electrode of said second transistor (32) to the common point (B) between said first and second transistors, first and second N-channel field effect transistors (22, 26) each having a gate electrode, said first and second N-channel transistors being serially connected between said data output terminal (24) and a point of reference potential with the source of said first N-channel transistor (22) being connected to said point of reference potential and the gate electrode of said second N-channel transistor (26) being connected to said voltage source means (28), means for applying control voltages to the gate electrodes of said first, second and third P-channel transistors (30, 32, 36) and to said first N-channel transistor (26), and means for selectively applying a voltage to said data output terminal having a magnitude significantly greater than that of said given magnitude.

Claim 8

Dependent Claim 229 words

A CMOS off-chip driver circuit comprising voltage source means (28) for providing a supply voltage of a given magnitude, a data output terminal (24), first, second and third P-channel field effect transistors (30, 32, 36) each having a gate electrode, said first or pull-up transistor (30) and said second transistor (32) being serially connected between said voltage source means (28) and said data output terminal (24) with the source of said second transistor (32) being connected to said voltage source means (28) and said third transistor (36) being connected from the gate electrode of said second transistor (32) to the common point (B) between said first and second transistors, first and second N-channel field effect transistors (22, 26) each having a gate electrode, said first and second N-channel transistors being serially connected between said data output terminal (24) and a point of reference potential with the source of said first N-channel transistor (22) being connected to said point of reference potential and the gate electrode of said second N-channel transistor (26) being connected to said voltage source means (28), means for applying control voltages to the gate electrodes of said first, second and third P-channel transistors (30, 32, 36) and to said first N-channel transistor (26), and means for selectively applying a voltage to said data output terminal having a magnitude significantly greater than that of said given magnitude.

Claim 9

Dependent Claim 108 words

A CMOS off-chip driver circuit as set forth in claim 6 wherein said control voltage applying means applies voltages to the gate electrodes of said first P-channel transistor (30) and said first N-channel transistor (22) so as to place said data output terminal in a high voltage state during a first interval of time, in a low voltage state during a second interval of time and in a high impedance state during a third interval of time and said selectively applying voltage means applying said voltage of a magnitude significantly greater than that of said given magnitude to said data output terminal during said third interval of time.

Claim 10

Dependent Claim 80 words

A CMOS off-chip driver circuit as set forth in claim 7 wherein said control voltage applying means includes an AND-INVERT circuit (18) having an output connected to the gate electrode of said first P-channel transistor (30), an OR-INVERT circuit (16) having an output connected to the gate electrode of said first N-channel transistor (22) and a data in terminal (20) connected to a first input of said AND-INVERT circuit (18) and to a first input of said OR-INVERT circuit (16).

Claim 11

Dependent Claim 61 words

A CMOS off-chip driver circuit as set forth in claim 8 wherein said control voltage applying means further includes an INVERT circuit (14) having an output connected to a second input of said OR-INVERT circuit (16), and an output enable terminal (10) connected to a second input of said AND-INVERT circuit (18) and to an input of said INVERT circuit (14).

Claim 12

Dependent Claim 97 words

A CMOS off-chip driver circuit as set forth in claim 9 wherein said control voltage applying means further includes third and fourth N-channel field effect transistors serially connected between the gate electrode of said second P-channel field effect transistor (32) and said point of reference potential, the source of said third N-channel transistor (12) being connected to said point of reference potential, the gate electrode of said third N-channel transistor (12) being connected to said output enable terminal (10) and the gate electrode of said fourth N-channel transistor (34) being connected to said voltage source means (28).

Claim 13

Dependent Claim 30 words

A CMOS off-chip driver circuit as set forth in claims 6 to 11 further including a common N-well (40), each of said P-channel transistors being disposed in said common N-well.

Claim 14

Dependent Claim 60 words

A CMOS off-chip driver circuit as set forth in claim 1 further including a fourth P-channel field effect transistor (38) disposed in said common N-well (40), said fourth P-channel transistor (38) having a source connected to said voltage source means (28), a drain connected to said common N-well (40) and a gate electrode connected to said data output terminal (24).

Claim 15

Dependent Claim 51 words

A CMOS off-chip driver circuit as set forth in one of the claims 6 to 12 wherein the gate electrodes of said P-channel transistors (30, 32, 38) are made of a material which provides a work function producing about one volt at each of the gate electrodes of the P-channel devices.

Claim 16

Dependent Claim 18 words

A CMOS off-chip driver circuit as set forth in claim 13 wherein said material is N-type doped polysilicon.

Claim 17

Dependent Claim 42 words

A CMOS off-chip driver circuit as set forth in claims to 14 wherein the supply voltage of said given magnitude is approximately 3.3 volts and the voltage having a magnitude significantly greater than that of said given magnitude is approximately 5.5 volts.

CMOS off-chip driver circuit

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