EP0304263A2
Expired / Lapsed
EP
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Semiconductor chip assembly
Assignee: LSI Corp
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Filing: 1988-08-15
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Granted: —
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Expires: 2008-08-15
Abstract
Abstract An integrated circuit assembly includes a plurality of semiconductor chips (10,18,20,22) which are joined mechanically and electrically. The semiconductor chips are formed by the same or different device technology, and can function as different types of elements or circuits.
Inventors
- 👤 Wilfried J. Corrigan
- 👤 Conrad J. Dell'oca
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 07:12
CPC Classifications
H; H10; H10W; H10W90/00; H10W72/00; H10W72/851; H10W72/853; H10W72/859; H10W90/701; H10W90/721; H10W90/722; H10W90/724; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
71 words
An assembly of stacked semiconductor chips comprising: a mother carrier chip (10;10a;26) having a major surface on which an electronic circuit is formed by a specified semiconductor technology; and a plurality of daughter chips (12;18,20,22;22;24;28;12a,126,12c) each having a major surface on which an electronic circuit is formed, the major surface being physically and electronically connected to the major surface of the mother carrier chip and supported on the mother carrier chip.
Claim 2
Dependent Claim
71 words
An assembly of stacked semiconductor chips comprising: a mother carrier chip (10;10a;26) having a major surface on which an electronic circuit is formed by a specified semiconductor technology; and a plurality of daughter chips (12;18,20,22;22;24;28;12a,126,12c) each having a major surface on which an electronic circuit is formed, the major surface being physically and electronically connected to the major surface of the mother carrier chip and supported on the mother carrier chip.
Claim 3
Dependent Claim
25 words
An assembly as claimed in claim 1 wherein the function of at least one of the daughter chips complements the function of the mother chip.
Claim 4
Dependent Claim
30 words
An assembly as claimed in claim 1 or 2 wherein at least one of the daughter chips is a passive chip for use as a bus, ground plane or interconnect.
Claim 5
Dependent Claim
60 words
An assembly as claimed in claim 1, 2 or 3 wherein at least two of the daughter chips are formed with technologies different from each other and from the specified technology of the mother chip so that each chip of the mother and the at least two daughter chips provides a function that differs from any other of the chips.
Claim 6
Dependent Claim
34 words
An assembly as claimed in claim 1, 2, 3 or 4 wherein a first daughter chip functions as a programmable read only memory and a second daughter chip functions as a random access memory.
Claim 7
Dependent Claim
22 words
An assembly as claimed in any preceding claim wherein at least two of the daughter chips are electrically connected to each other.
Claim 8
Dependent Claim
26 words
An assembly as claimed in any preceding claim wherein at least one of the daughter chips is connected to the mother chip by an adhesive (31).
Claim 9
Dependent Claim
26 words
An assembly as claimed in any preceding claim wherein at least one of the daughter chips is connected to the mother chip by solder bumps (14).
Claim 10
Independent Claim
84 words
A method for forming a stacked assembly of semiconductor chips, each chip having a major surface on which electronic circuitry is formed, the method comprising the steps of: attaching with adhesive first and second chips so that the major surface of the chips are disposed in different planes; wire bonding and electrically interconnecting the electronic circuitry of the first and second chips; and joining by solder bumps the major faces and electrically interconnecting the electronic circuitry of the second chip and a third chip.
Claim 11
Independent Claim
84 words
A method for forming a stacked assembly of semiconductor chips, each chip having a major surface on which electronic circuitry is formed, the method comprising the steps of: attaching with adhesive first and second chips so that the major surface of the chips are disposed in different planes; wire bonding and electrically interconnecting the electronic circuitry of the first and second chips; and joining by solder bumps the major faces and electrically interconnecting the electronic circuitry of the second chip and a third chip.
Claim 12
Dependent Claim
40 words
A method as claimed in claim 9 including the step of joining and electrically connecting the major surface of said second chip either to the major surface of the first chip or to the major surface of the third chip.
References Cited (Backward Citations)
No citation records indexed.
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