Interconnection method for semiconductor device

Claim 2

An interconnection method for a semiconductor device which comprises the steps of depositing a high-tem­perature superconductive material over an interlevel insulation layer, and irradiating an energy beam onto a high-temperature superconductive material layer thus formed by said step so as to effect anneal treatment.

Claim 3

An interconnection method as claimed in Claim 1, wherein contact with respect to interconnecting by said superconductive material is effected in a horizontal direc­tion of said wiring.

Claim 4

An inter connecting method for a semiconductor device which comprises the steps of depositing an interlevel insulation layer of a predetermined thickness over a semiconductor substrate formed with a first level matal on its surface and active elements in its lower semiconductor layer, and forming through-holes for connecting the first layer metal with a second level inter­connection in said interlevel insulation layer subsequently depositing a high-temperature superconductive material over the entire surface of said semiconductor substrate, thereafter heat-treating said high-temperature superconductive material thus deposited over the surface of said semi-conductor substrate by laser annealing for imparting thereto superconductive characteristics, with simultaneous alignment of crystal orientation, and finally removing unnecessary portion of the high-temperature superconductive material by etching to complete the semiconductor wiring.

Claim 5

An inter connecting method for a semiconductor device which comprises the steps of depositing an interlevel insulation layer of a predetermined thickness over a semiconductor substrate formed with a first level matal on its surface and active elements in its lower semiconductor layer, and forming through-holes for connecting the first layer metal with a second level inter­connection in said interlevel insulation layer subsequently depositing a high-temperature superconductive material over the entire surface of said semiconductor substrate, thereafter heat-treating said high-temperature superconductive material thus deposited over the surface of said semi-conductor substrate by laser annealing for imparting thereto superconductive characteristics, with simultaneous alignment of crystal orientation, and finally removing unnecessary portion of the high-temperature superconductive material by etching to complete the semiconductor wiring.

Claim 6

An interconnection method as claimed in Claim 3, wherein said interlevel insulation layer is applied through employment of SiO₂ by a chemical deposition process to such a thickness as will supply sufficient heat to the high-temperature superconductive material, but conduct only a small amount of heat to the lower semiconductor layer so as not to cause degradation or destruction of the active elements formed therein during laser annealing for the heat-treatment of said high-temperature superconductive material.

Claim 7

An interonnection method as claimed in Claim 3, further including a step of filling said through-holes by a metallic material.