EP0295497A2
Expired / Lapsed
EP
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High-dynamics amplifier stage with distortion detection
Assignee: STMicroelectronics SRL
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Filing: 1988-06-01
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Granted: —
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Expires: 2008-06-01
Abstract
Abstract In an amplifier stage comprising a pair of input current sources (I₁, I₂), connected in series between a pair of reference potential lines (+V cc , -V cc ), a pair of output transistors (Q₅, Q₆), connected between the pair of reference potential lines and defining an intermediate output terminal (D) of the amplifier, a driving circuit (Q₁-Q₄, Q₇, R₁) comprising active elements and interposed between the input current source and the output transistors, and at least one saturation control circuit (Q A , Q B , R A , R B ) comprising at least one control transistor (Q A ; Q B ) connected with its base to the driving circuit and with its collector and emitter between the output (D) of the amplifier stage and the intermediate point (A) between the input current sources, to detect distortion due to clipping, at least one distortion detection transistor (Q′ A ; Q′ B ) is provided, connected to the control transistor (Q A ; Q B ) so as to detect the current flowing through the latter, which current is related to the imbalance of the input current sources and therefore to the distortion generated in the stage.
Inventors
- 👤 Edoardo Botti
- 👤 Fabrizio Stefani
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 08:39
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03F; H03F1/00; H03F1/32; H03F1/3217
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
189 words
A high-dynamics amplifier stage with distortion detection, comprising a pair of input current sources (I₁,I₂), connected in series between a pair of reference potential lines (+V cc , -V cc ), a pair of output transistors (Q₅, Q₆), connected between said pair of reference potential lines and defining therebetween an output terminal (D) of said amplifier stage, a driving circuit (Q₁-Q₄, Q₇, R₁) including active elements and interposed between said input current sources and said output transistors, and at least one saturation control circuit (R A , R B , Q A , Q B ) including at least one control transistor (Q A , Q B ) connected with its base terminal to said driving circuit and with its collector and emitter terminals between one of said output transistors (Q₆, Q₅) and the input current sources, characterized by at least one distortion detection transistor (Q′ A , Q′ B ) connected to said control transistor (Q A , Q B ) so as to supply a distortion detection current proportional to the current flowing through said control transistor and correlated to the distortion generated by said amplifier stage.
Claim 2
Dependent Claim
189 words
A high-dynamics amplifier stage with distortion detection, comprising a pair of input current sources (I₁,I₂), connected in series between a pair of reference potential lines (+V cc , -V cc ), a pair of output transistors (Q₅, Q₆), connected between said pair of reference potential lines and defining therebetween an output terminal (D) of said amplifier stage, a driving circuit (Q₁-Q₄, Q₇, R₁) including active elements and interposed between said input current sources and said output transistors, and at least one saturation control circuit (R A , R B , Q A , Q B ) including at least one control transistor (Q A , Q B ) connected with its base terminal to said driving circuit and with its collector and emitter terminals between one of said output transistors (Q₆, Q₅) and the input current sources, characterized by at least one distortion detection transistor (Q′ A , Q′ B ) connected to said control transistor (Q A , Q B ) so as to supply a distortion detection current proportional to the current flowing through said control transistor and correlated to the distortion generated by said amplifier stage.
Claim 3
Dependent Claim
227 words
A high-dynamics amplifier stage according to claim 1, comprising a pair of saturation control circuits (R A , R B , Q A , Q B ) respectively including at least a first (Q B ) and a second (Q A ) control transistors connected with their base terminals to said driving circuit (Q₁-Q₄, Q₇, R₁), said first control transistor (Q B ) being connected with its emitter terminal to said output terminal (D) and with its collector terminal to said input current sources (I₁, I₂), and said second control transistor (Q A ) being connected with its collector terminal to said output terminal (D) and with its emitter terminal to said input current sources, characterized by a first distortion detection transistor (Q B ) connected with its own base terminal to the base terminal of said first control (Q B ) transistor and with its own emitter terminal to the emitter terminal of said first control transistor and a second distortion detection transistor (Q′ A ) connected with its own base terminal to the base terminal of said second control transistor (Q A ) and with its own collector terminal to the collector terminal of said second control transistor, said distortion detection transistors supplying distortion detection currents proportional to the currents flowing through the associated control transistors and correlated to the distortion generated by said stage.
Claim 4
Dependent Claim
32 words
An amplifier stage according to claim 1 or 2, characterized in that said distortion detection current or currents is/are sent to a controlled attenuator (7) connected ahead of said amplifier stage (1).
Claim 5
Dependent Claim
29 words
An amplifier stage according to any of the preceding claims, characterized by a delay circuit (5,6) arranged between said distortion detection transistor or transistors and said controlled attenuator (7).
Claim 6
Dependent Claim
88 words
An amplifier stage according to any of claims 2 to 4, characterized by an adder circuit (Q S1 , Q S2 ) interposed between said distortion detection transistors and said controlled attenuator (7) and having a first input connected to the collector terminal of said first detection transistor (Q′ B ) and a second input connected to the emitter terminal of said second detection transistor (Q′ A ) for generating at the output a current signal equal to the sum of the currents flowing through said detection transistors.
Claim 7
Dependent Claim
116 words
An amplifier stage according to claim 5, characterized in that said adder circuit comprises a current mirror circuit including a first and a second adder transistors (Q S1 , Q S2 ) said first adder transistor (Q S1 ) having its collector terminal connected to the emitter terminal of said second detection transistor (Q′ A ), to its own base terminal and to the base terminal of said second adder transistor (Q S2 ), said adder transistors having mutually connected emitter terminals and said second adder transistor (Q S2 ) having its own collector terminal connected to the collector terminal of said first detection transistor (Q′ B ) and forming the output of said adder circuit.
Claim 8
Dependent Claim
71 words
An amplifier stage according to claims 5 and 6, characterized in that said output of said adder circuit is connected, through a current-voltage converter (R REF ), to a first input (+) of a comparator circuit (21) having a second input (-) set to a threshold reference voltage, said comparator circuit generating at the output a control signal when the distortion detected by said detection transistors exceeds said threshold reference voltage.
References Cited (Backward Citations)
No citation records indexed.
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