Integrated circuit substrate product

Claim 2

An integrated circuit substrate product comprising in combination: a member having an essentially planar surface area (15), said member having a supporting region (1), and serially respectively between said supporting region (1) and said surface (15), a layer (2) of device quality monocrystalline material of a semiconductor having erosion termination capability (8) and being epitaxial with said supporting region (1), a stop layer (11) of a monocrystalline material capable of terminating at least an erosion operation to which said semiconductor is responsive epitaxial with said device layer (2), and an epitaxial regrowth enabling layer (9) of said semiconductor material epitaxial with said device layer (2) and including an epitaxial stop layer (14).

Claim 3

The product of claim 1 where said erosion termination capability is each provided by a layer (8, 11) of material with at least one of a different physical or chemical response property.

Claim 4

The product of claim 2 wherein the material of said erosion termination capability layer (8) and said stop layer (11) has a higher atom binding energy than said semiconductor material.

Claim 5

The product of claims 1 to 3 where said semiconductor material is of the compound semi­conductor material type.

Claim 6

The product of claim 4 wherein said supporting region (1) is a high resistivity region of said compound semiconductor material.

Claim 7

The product of claims 2 to 5 wherein said compound semiconductor material is taken from the group of GaAs, InAs and the alloys thereof.

Claim 8

The product of claims 2 to 5 wherein said compound semiconductor is GaAs and the material of said erosion termination capability layer (8) and said stop layer is of Ga x Al 1-x As.

Claim 9

The product of claims 1 to 7 where said epitaxial stop capability is a dielectric layer (14).

Claim 10

The process of fabricating an integrated circuit comprising in combination the steps of: providing a compound semiconductor material substrate member having an essentially planar surface area (15), said member having a supporting region (1), serially respectively between said supporting region (1) and said surface (15), a layer (2) of device quality monocrystalline material of said compound semiconductor having erosion termination capability (8) and being epitaxial with said supporting region (1), a stop layer (11) of a monocrystalline material epitaxial with said device layer (2) and being capable of terminating at least an erosion operation to which said compound semiconductor is responsive, an epitaxial regrowth enabling layer (9) of said compound semiconductor material epitaxial with said device layer (2) and including an stop layer, and a layer of a regrowth inhibiting layer (14), removing in an opening pattern corresponding to device electrodes said regrowth inhibiting layer (14), said epitaxial regrowth enabling layer (9) and said stop layer (11), eroding said device layer (2) through said opening pattern until said termination capability (8) of said device layer (2) is employed, regrowing device material with selectable doping in said opening pattern, removing polycrystalline regrown material, said regrowth inhibiting layer (14) and said regrowth enabling layer (9) from areas to serve as isolation, remove polycrystalline regrown material and said regrowth inhibiting layer (14) from gate areas between device electrode areas in said pattern, and applying ohmic contacts to the regrown material in the openings in said pattern and on said gate areas.

Claim 11

The process of fabricating an integrated circuit comprising in combination the steps of: providing a compound semiconductor material substrate member having an essentially planar surface area (15), said member having a supporting region (1), serially respectively between said supporting region (1) and said surface (15), a layer (2) of device quality monocrystalline material of said compound semiconductor having erosion termination capability (8) and being epitaxial with said supporting region (1), a stop layer (11) of a monocrystalline material epitaxial with said device layer (2) and being capable of terminating at least an erosion operation to which said compound semiconductor is responsive, an epitaxial regrowth enabling layer (9) of said compound semiconductor material epitaxial with said device layer (2) and including an stop layer, and a layer of a regrowth inhibiting layer (14), removing in an opening pattern corresponding to device electrodes said regrowth inhibiting layer (14), said epitaxial regrowth enabling layer (9) and said stop layer (11), eroding said device layer (2) through said opening pattern until said termination capability (8) of said device layer (2) is employed, regrowing device material with selectable doping in said opening pattern, removing polycrystalline regrown material, said regrowth inhibiting layer (14) and said regrowth enabling layer (9) from areas to serve as isolation, remove polycrystalline regrown material and said regrowth inhibiting layer (14) from gate areas between device electrode areas in said pattern, and applying ohmic contacts to the regrown material in the openings in said pattern and on said gate areas.

Claim 12

The process of claim 9 wherein said compound semiconductor is GaAs.

Claim 13

The process of claim 9 including a GaInAs channel region in said device layer (2) parallel to said stop layer (11).