Nonvolatile semiconductor memory

Claim 1

A nonvolatile semiconductor memory, in which part of a floating gate electrode overlaps a diffusion layer through a thin insulting film, characterized by comprising: a substrate (10) of a first conductivity type; first, second, and third diffusion layer (11, 12, 13) of a second conductivity type formed in said substrate (10); a first channel region (14) in that portion of said substrate (10)s which extends between said first and second diffusion layers (11, 12); a second channel region (20) formed in that portion of said substrate (10) which extends between said second and third diffusion layers (12, 13); said floating gate electrode (16) formed above said first channel region (14), part of said floating gate electrode (16) being formed on said thin insulating film (17) formed on said second diffusion layer (12); a control gate electrode (19) formed above said floating gate electrode (16); a gate electrode (22) formed above said second channel region (20); a control gate line (CG) for applying predetermined voltages to said control gate electrode (19) in data erase, data write, and data read modes, respectively; a selection gate line (SG) for applying predeter­mined voltages to said gate electrode (22) in the data erase, data write, and data read modes, respectively; a write line (WL) for applying predetermined volt­ages to said third diffusion layer (13) in the data erase, data write, and data read modes, respectively; and a read line (RL) for applying predetermined volt­ages to said first diffusion layer (11) in the data erase, data write, and data read modes, respectively.