Conductivity-modulation metal oxide semiconductor field effect transistor

Claim 2

A semiconductor device comprising a semiconduc­tive substrate (30, 30ʹ, 50ʹ, 80, 100, 200, 200), and a conductivity-modulation unipolar transistor formed on said substrate, said transistor having a first base region (30, 50, 30ʹ, 80, 100, 106, 222), a second base region (32, 84, 204), a source region (34, 88, 208) formed in said second base region, a source electrode region (38, 68, 92, 212) for electrically conducting said second base region and said source region, a drain region (44, 86, 206), a drain electrode (48, 72, 94, 214, 242) formed on said drain region, and a gate electrode (36, 36ʹ, 96, 216) insulatively provided on said substrate, characterized in that means (40, 46; 90, 98; 210, 218, 224) is provided for, when said transistor is turned off, increasing an electrical connectivity between said first base region and said drain electrode in such a manner as to facilitate carriers stored or accumulated in said first base region to flow into said drain electrode, thereby accelerating dispersion of the carriers in said transistor.

Claim 3

The device according to claim 1, characterized in that said means (40, 46; 90, 98; 210, 218, 224) is provided on said substrate (30, 30ʹ, 50, 80, 100, 200) and connected to said transistor, said means decreasing the electrical connectivity between said first base region and said drain electrode when said transistor is turned on.

Claim 4

The device according to claim 2, characterized in that said means comprises a switching transistor (40, 46; 90, 98; 210, 218, 224) for, when said conductivity-­modulation transistor is turned off, electrically conducting said first base region (30, 50, 30ʹ, 80, 106, 106ʹ, 222ʹ) to said drain electrode (48, 48ʹ, 72, 94, 214, 242), and for, when said conductivity-modulation transistor is turned on, electrically disconnecting said first base region from said drain electrode.

Claim 5

The device according to claim 3, characterized in that said conductivity-modulation transistor includes a first metal oxide semiconductor field effect tran­sistor, and said switching transistor includes a second metal oxide semiconductor field effect transistor.

Claim 6

The device according to claim 4, characterized in that said first and second metal oxide semiconductor field effect transistors are respectively formed on opposite surfaces of said substrate (30, 50, 30ʹ).

Claim 7

The device according to claim 4, characterized in that said first and second metal oxide semiconductor field effect transistors are respectively formed on first and second surface regions on one surface of said substrate (80, 100, 200).

Claim 8

The device according to claim 4, characterized in that said second metal oxide semiconductor field effect transistor has a channel region (CH2) including a lightly-doped bypass layer (224) in which an impurity of the same conductivity type as that of said first base region is implanted, whereby said first base region (22) is half-conducted to said drain electrode (214) through said bypass layer (224) of said second metal oxide semiconductor field effect transistor.

Claim 9

The device according to claim 1, characterized in that said means comprises a lightly-doped bypass layer (224), formed in said substrate and implanted with an impurity of the same conductivity type as that of said first base region, for constantly half-conducting said first base region (222) to said drain electrode (214) throughout turn-on and turn-off modes of said transistor.

Claim 10

A conductivity-modulation unipolar field effect transistor device comprising a semiconductive substrate (30, 30ʹ, 50, 80, 100, 200); a first semiconductive base layer (30, 30ʹ, 50, 80, 106, 106ʹ, 222) of a first conductivity type provided in said substrate; a first semiconductive diffusion layer (32, 84, 204) of a second conductivity type formed in said substrate and serving as a second base of said device; a second semiconductive diffusion layer (34, 88, 208) of the first conductivity type formed in said first diffusion layer and serving as a first source of said device, said second diffusion layer defining said a first channel region (CH1) in said first diffusion layer; a source electrode layer (38, 68, 92, 212), formed on said substrate, for electrically connecting said first and second diffusion layers; and a first gate electrode layer (36, 36ʹ, 96, 216), insula­tively provided above said substrate, for covering said first channel region, characterized in that said device further comprises a third semiconductive diffusion layer (44, 86, 206) of the second conductivity type formed in said substrate and serving as a drain of said device; a fourth semiconductive diffusion layer (46, 90, 210) of the first conductivity type formed in said third diffusion layer and serving as a second source of said device, said fourth diffusion layer defining a second channel region (CH2) in said third diffusion layer; a drain electrode layer (48, 72, 94, 214, 242), formed on said substrate, for electrically connecting said third and fourth diffusion layers; and a second gate electrode layer (40, 62, 98, 218), insulatively provided above said substrate, for covering said second channel region, said fourth diffusion layer and said second gate elect­rode layer constituting a voltage-controlled switching transistor which is rendered conductive when said device is turned off, and temporarily forms a "shorted anode structure" in said device, thereby increasing an electrical connectivity between said first base layer and said drain electrode layer, so as to facilitate carriers accumulated in said first base layer to flow into said drain electrode layer, whereby dispersion of carriers in said device is accelerated to increase a turn-off speed thereof.

Claim 11

A conductivity-modulation unipolar field effect transistor device comprising a semiconductive substrate (30, 30ʹ, 50, 80, 100, 200); a first semiconductive base layer (30, 30ʹ, 50, 80, 106, 106ʹ, 222) of a first conductivity type provided in said substrate; a first semiconductive diffusion layer (32, 84, 204) of a second conductivity type formed in said substrate and serving as a second base of said device; a second semiconductive diffusion layer (34, 88, 208) of the first conductivity type formed in said first diffusion layer and serving as a first source of said device, said second diffusion layer defining said a first channel region (CH1) in said first diffusion layer; a source electrode layer (38, 68, 92, 212), formed on said substrate, for electrically connecting said first and second diffusion layers; and a first gate electrode layer (36, 36ʹ, 96, 216), insula­tively provided above said substrate, for covering said first channel region, characterized in that said device further comprises a third semiconductive diffusion layer (44, 86, 206) of the second conductivity type formed in said substrate and serving as a drain of said device; a fourth semiconductive diffusion layer (46, 90, 210) of the first conductivity type formed in said third diffusion layer and serving as a second source of said device, said fourth diffusion layer defining a second channel region (CH2) in said third diffusion layer; a drain electrode layer (48, 72, 94, 214, 242), formed on said substrate, for electrically connecting said third and fourth diffusion layers; and a second gate electrode layer (40, 62, 98, 218), insulatively provided above said substrate, for covering said second channel region, said fourth diffusion layer and said second gate elect­rode layer constituting a voltage-controlled switching transistor which is rendered conductive when said device is turned off, and temporarily forms a "shorted anode structure" in said device, thereby increasing an electrical connectivity between said first base layer and said drain electrode layer, so as to facilitate carriers accumulated in said first base layer to flow into said drain electrode layer, whereby dispersion of carriers in said device is accelerated to increase a turn-off speed thereof.

Claim 12

The device according to claim 9, characterized in that said switching transistor is rendered nonconduc­tive when said device is turned on, so as to decrease the electrical connectivity between said first base layer (30, 30ʹ, 50, 80, 106, 106ʹ, 222) and said drain electrode layer (48, 72, 94, 214, 242).

Claim 13

The device according to claim 10, characterized in that when said switching transistor is rendered conductive, a reverse-conducting diode consisting of said first and second base layers is formed, said reverse-conducting diode being reverse-biased when said device is turned off, thereby increasing a withstanding voltage of said device.

Claim 14

The device according to claim 11, characterized in that said device further comprises a semiconductive buffer layer (42, 82, 104, 220) of the first conductivi­ty type formed in said substrate and connected to said third diffusion layer, said buffer layer suppressing generation of a punch-through phenomenon to increase a withstand voltage of said device and to decrease a forward voltage drop of said reverse-conducting diode.

Claim 15

The device according to claim 10, characterized in that said device further comprises a heavily-doped diffusion layer (52, 234) of the second conductivity type which is formed in said third diffusion layer (44, 86) to overlap said fourth diffusion layer (46, 90) and to improve injection efficiency of holes from said fourth diffusion layer.

Claim 16

The device according to claim 13, characterized in that said first gate electrode layer (36, 36ʹ) and said second gate electrode layer (40, 62) are formed on opposite surfaces of said substrate (30, 30ʹ, 50), whereas said first diffusion layer (32) and said third diffusion layer(44, 44ʹ) are respectively formed on opposite surfaces of said substrate (30, 30ʹ, 50).

Claim 17

The device according to claim 13, characterized in that said first gate electrode layer (96, 216) and said second gate electrode layer (98, 218) are formed on one surface of said substrate (80, 100, 200), and characterized in that said first diffusion layer (84, 204) and said third diffusion layer (86, 206) are formed on one surface of said substrate (80, 100, 200).

Claim 18

The device according to claim 9, characterized in that said switching transistor has a semiconductive bypass layer (224) of the second conductivity type in said second channel region (CH2), whereby said first base layer (222) is half-conducted to said drain elect­rode layer (214) through said byapss layer (224).

Claim 19

The device according to claim 16, characterized in that said first and second gate electrode layers (96, 216; 98, 218) are formed on one surface of said substrate (80, 100, 200), whereas said first and third diffusion layers (84, 204; 86, 206) are formed in said one surface of said substrate.

Claim 20

The device according to claim 17, characterized in that said drain electrode layer (214) has an electrode portion located between said first and second gate electrode layers (216, 218) on said one surface of said substrate (200).

Claim 21

The device according to claim 10, characterized in that said switching transistor is rendered conductive before said device is turned off.

Claim 22

The device according to claim 12, characterized in that said buffer layer (42b, 104, 220) is formed by multiple diffusion in a self-aligned manner with said third diffusion layer (44, 86, 206).

Claim 23

A conductivity-modulation metal oxide semi­conductor field effect transistor device having a double-gate structure, comprising a semiconductive substrate (80, 100, 200) having a surface; a first semiconductive base layer (80, 106, 106ʹ, 222) of a first conductivity type, provided in said substrate; a first semiconductive diffusion layer (84, 204) of a second conductivity type formed in the surface of said substrate to serve as a second base of said device; a second semiconductive diffusion layer (88, 208) of the first conductivity type formed in said first diffusion layer and serving as a first source of said device, said second diffusion layer defining a first channel region (CH1) in said first diffusion layer; and a first gate diffusion layer (96, 216) insulatively provided above the surface of said substrate and covering said first channel region, characterized in that said device further comprises a third semiconductive diffusion layer (86, 206) of the second conductivity type formed in the surface of said substrate and serving as a drain of said device; a fourth semiconductive diffusion layer (90, 210) of the first conductivity type formed in said third diffusion layer and serving as a second source of said device, said fourth diffusion layer defining a second channel region (CH2) in said third diffusion layer; and a second gate electrode layer (98, 218) insulatively provided above the surface of said substrate and covering said second channel region, said fourth and second gate electrode layers constituting a voltage-controlled switching transistor which is rendered conductive when said device is turned off and and electrically shorts said first base layer (80, 106, 106ʹ, 222) to said fourth diffusion layer (90, 21) by temporarily forming a "shorted anode structure" in said device, whereby dispersion of carriers accumulated in said first base layer is accelerated to increase a turn-off speed of said device, said switching transistor being rendered nonconductive when said device is turned on, so as to disconnect said fourth diffusion layer (90, 210) from said first base layer (80, 106, 106ʹ, 222).

Claim 24

A conductivity-modulation metal oxide semi­conductor field effect transistor device having a double-gate structure, comprising a semiconductive substrate (80, 100, 200) having a surface; a first semiconductive base layer (80, 106, 106ʹ, 222) of a first conductivity type, provided in said substrate; a first semiconductive diffusion layer (84, 204) of a second conductivity type formed in the surface of said substrate to serve as a second base of said device; a second semiconductive diffusion layer (88, 208) of the first conductivity type formed in said first diffusion layer and serving as a first source of said device, said second diffusion layer defining a first channel region (CH1) in said first diffusion layer; and a first gate diffusion layer (96, 216) insulatively provided above the surface of said substrate and covering said first channel region, characterized in that said device further comprises a third semiconductive diffusion layer (86, 206) of the second conductivity type formed in the surface of said substrate and serving as a drain of said device; a fourth semiconductive diffusion layer (90, 210) of the first conductivity type formed in said third diffusion layer and serving as a second source of said device, said fourth diffusion layer defining a second channel region (CH2) in said third diffusion layer; and a second gate electrode layer (98, 218) insulatively provided above the surface of said substrate and covering said second channel region, said fourth and second gate electrode layers constituting a voltage-controlled switching transistor which is rendered conductive when said device is turned off and and electrically shorts said first base layer (80, 106, 106ʹ, 222) to said fourth diffusion layer (90, 21) by temporarily forming a "shorted anode structure" in said device, whereby dispersion of carriers accumulated in said first base layer is accelerated to increase a turn-off speed of said device, said switching transistor being rendered nonconductive when said device is turned on, so as to disconnect said fourth diffusion layer (90, 210) from said first base layer (80, 106, 106ʹ, 222).

Claim 25

The device according to claim 21, characterized in that said third diffusion layer (86) is formed on the surface of said substrate (100) to have an island shape, whereas said first diffusion layer (84) is formed to two-dimensionally surround said third diffusion layer (86).

Claim 26

The device according to claim 21, characterized in that said first diffusion layer (84) is formed on the surface of said substrate to have an island shape, whereas said third diffusion layer (86) is formed to two-dimensionally surround said first diffusion layer (84).

Claim 27

The device according to claim 21, characterized in that said first diffusion layer (84) and said third diffusion layer (86) are formed on the surface of said substrate (80) to have an island shape, respectively.

Claim 28

The device according to claim 24, characterized in that said device further comprises a semiconductive diffusion layer (114) of the first conductivity type, which is formed in the surface of said substrate to two-dimensionally surround said first diffusion layer (84) and said third diffusion layer (86).

Claim 29

The device according to claim 21, characterized in that said device further comprises a semiconductive diffusion layer (234) of the first conductivity type, which is formed in said third diffusion layer (86, 206) and accelerates injection of a second kind of carriers from said third diffusion layer.

Claim 30

The device according to claim 21, characterized in that said fourth diffusion layer (90) is at least partially formed to be discontinuous, so that said second channel region (CH2) is divided into first sub channels (CH2-1) which substantially contribute to transistor action and second sub channels (CH2-2) which do not substantially contribute to transistor action.

Claim 31

The device according to claim 27, characterized in that said first sub channels (CH2-1) and said second sub channels (CH2-2) are alternately arranged along said second channel region (CH2).

Claim 32

The device according to claim 28, characterized in that said device further comprises lightly-doped high-resistance semiconductive diffusion layers (304) of a conductivity type opposite to that of said fourth diffusion layer, which are provided in said first sub channels (CH2-1) so as to be in electrical contact with said fourth diffusion layer (98), said high-resistance layers (304) allowing discharge of carriers into said drain of said device when said device is turned off.

Claim 33

The device according to claim 29, characterized in that said device further comprises a seventh semi­conductive diffusion layer (306) of the first conduc­tivity type, which is linearly formed in said substrate along said second channel region (CH2), for electrically connecting first end portions of said high-resistance layers (304).