EP0276693A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Integrated circuit process using polycrystalline layers and contacts
Assignee: Motorola Solutions Inc
•
Filing: 1988-01-14
•
Granted: —
•
Expires: 2008-01-14
Abstract
Abstract A process is disclosed for fabricating improved integrated circuit devices which produces small device areas without relying upon restrictive photolithography tolerances. Four polycrystalline silicon layers are used to fabricate and contact the device regions, to achieve a relatively planar structure, and to reduce the size of device regions below normal photolithographic tolerances. A master mask is used to define the basic footprint of the device in combination with easy to align block-out masks in each lithography step. Means and methods for many types of devices such as complementary lateral and vertical bipolar transistors, JFETs, Sits, MOSFETs, resistors, diodes, capacitors and other devices which can be simultaneously fabricated are also described.
Inventors
- 👤 Peter J. Zdebel
- 👤 Bor-Yuan Hwang
- 👤 Raymond J. Balda
- 👤 Allen J. Wagner
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 16:36
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10P76/00; H10P76/40
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
292 words
A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface of a first conductivity type; forming a field insulator region having at least a first opening through which a first portion of said substrate surface is exposed; forming on said surface a first layer, wherein said first layer is of a first material which is conductive and which can subsequently be partially converted to a dielectric; forming a second layer overlying said first layer, wherein said second layer is of a second material which can protect first portions of said first layer while second portions of said first layer are converted to dielectric; forming a third layer overlying said second layer, wherein said third layer comprises a third material which can subsequently be partially converted to a dielectric; forming a fourth layer overlying said third layer, wherein said fourth layer is of a fourth material suitable for masking; patterning said third and fourth layers with a master mask to define a master electrode area containing first and second contact regions, said first contact region being located at least partially within said exposed portion of said substrate surface and said second contact region being located over said field insulator region, whereby said third and fourth layers are removed in said first and second contact regions and outside said master electrode area; removing portions of said second layer exposed outside said master electrode area to expose said second portion of said first layer; removing remaining portions of said fourth layer within said master electrode area to expose corresponding portions of said third layer; and converting said exposed portions of said first and third layers to form a first dielectric throughout the thickness of said exposed portions.
Claim 2
Dependent Claim
292 words
A process for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate having a surface of a first conductivity type; forming a field insulator region having at least a first opening through which a first portion of said substrate surface is exposed; forming on said surface a first layer, wherein said first layer is of a first material which is conductive and which can subsequently be partially converted to a dielectric; forming a second layer overlying said first layer, wherein said second layer is of a second material which can protect first portions of said first layer while second portions of said first layer are converted to dielectric; forming a third layer overlying said second layer, wherein said third layer comprises a third material which can subsequently be partially converted to a dielectric; forming a fourth layer overlying said third layer, wherein said fourth layer is of a fourth material suitable for masking; patterning said third and fourth layers with a master mask to define a master electrode area containing first and second contact regions, said first contact region being located at least partially within said exposed portion of said substrate surface and said second contact region being located over said field insulator region, whereby said third and fourth layers are removed in said first and second contact regions and outside said master electrode area; removing portions of said second layer exposed outside said master electrode area to expose said second portion of said first layer; removing remaining portions of said fourth layer within said master electrode area to expose corresponding portions of said third layer; and converting said exposed portions of said first and third layers to form a first dielectric throughout the thickness of said exposed portions.
Claim 3
Dependent Claim
78 words
The process of claim 1 further comprising: etching portions of said first layer in said first contact region to form an opening therethrough re-exposing a first part of said first portion of said substrate surface thereunder and edges of said first layer in said opening; and forming a second dielectric on said part of said exposed first part, and further on said edges of said first layer exposed in said first contact opening to form dielectric side-walls thereon.
Claim 4
Dependent Claim
92 words
The process of claim 2 further comprising prior to said step of forming said third layer, doping said first layer with a first dopant, and further comprising anytime after said step of doping said first layer, diffusing said first dopant from said first layer into a second part of said first portion of said substrate to form a first device region therein, and further comprising anytime after said step of doping said second part, doping said first part of said substrate with a second dopant to form a second device region therein.
Claim 5
Dependent Claim
69 words
The process of claim 1 further comprising the step of selecting the thickness of said first and third layers such that after said converting step, the dielectric formed from said first layer has substantially the same thickness as the sum of the thicknesses of the dielectric formed from said third layer plus the thickness of the unconverted portion of said first layer plus the thickness of said second layer.
Claim 6
Dependent Claim
149 words
A process for fabricating a semiconductor device, comprising: providing a substrate having an insulating region with an exposed surface; forming a first layer of semiconductor material at least on said exposed surface of said insulating region; forming a second layer of an oxidation resistant material on said first layer; forming a third layer of semiconductor material on said second layer; forming a fourth layer of a masking material on said third layer; patterning said fourth layer to provide at least first and second open regions and a closed region; removing first portions of said second and third layers at least under said first open region thereby exposing a first portion of said first layer while leaving other portions of said first, second and third layers covered by said closed region; and converting said first portion of said first layer and said other portion of said third layer to dielectric.
Claim 7
Dependent Claim
149 words
A process for fabricating a semiconductor device, comprising: providing a substrate having an insulating region with an exposed surface; forming a first layer of semiconductor material at least on said exposed surface of said insulating region; forming a second layer of an oxidation resistant material on said first layer; forming a third layer of semiconductor material on said second layer; forming a fourth layer of a masking material on said third layer; patterning said fourth layer to provide at least first and second open regions and a closed region; removing first portions of said second and third layers at least under said first open region thereby exposing a first portion of said first layer while leaving other portions of said first, second and third layers covered by said closed region; and converting said first portion of said first layer and said other portion of said third layer to dielectric.
Claim 8
Dependent Claim
57 words
The process of claim 5 wherein said removing step further comprises removing a first portion of said third layer under at least said first and second openings and removing a first portion of said second layer under at least said first opening while leaving a second portion of said second layer under said second opening in place.
Claim 9
Dependent Claim
42 words
The process of claim 5 further comprising after said converting steps; removing said second portion of said second layer to expose a second portion of said first layer, and applying a conductor in contact with said second portion of said second layer.
Claim 10
Dependent Claim
15 words
The process of claim 5 wherein said first open region substantially surrounds said closed region.
Claim 11
Dependent Claim
213 words
A process for forming a semiconductor device comprising: providing a semiconductor substrate having thereon a dielectric; providing a first layer of polycrystalline semiconductor material on said dielectric; providing a second layer of oxidation resistant material on said first layer; providing a third layer of polycrystalline semiconductor material on said second layer; providing a fourth layer of masking material on said third layer; removing first portions of said second, third and fourth layers so as to expose a first portion of said first layer and removing second portions of said third and fourth layers so as to expose a second portion of said second layer, wherein said first portion laterally encloses said second portion, and wherein third portions of said second and third layers remain laterally between said first and second portions, and wherein said third portion of said third layer is exposed; converting said first portion of said first layer and said third portion of said third layer to dielectric leaving second and third portions of said first layer underlying, respectively, said second and third portions of said second layer; removing said second portion of said second layer to expose said second portion of said first layer lying thereunder; and applying a conductor in contact with said second portion of said first layer.
Claim 12
Dependent Claim
213 words
A process for forming a semiconductor device comprising: providing a semiconductor substrate having thereon a dielectric; providing a first layer of polycrystalline semiconductor material on said dielectric; providing a second layer of oxidation resistant material on said first layer; providing a third layer of polycrystalline semiconductor material on said second layer; providing a fourth layer of masking material on said third layer; removing first portions of said second, third and fourth layers so as to expose a first portion of said first layer and removing second portions of said third and fourth layers so as to expose a second portion of said second layer, wherein said first portion laterally encloses said second portion, and wherein third portions of said second and third layers remain laterally between said first and second portions, and wherein said third portion of said third layer is exposed; converting said first portion of said first layer and said third portion of said third layer to dielectric leaving second and third portions of said first layer underlying, respectively, said second and third portions of said second layer; removing said second portion of said second layer to expose said second portion of said first layer lying thereunder; and applying a conductor in contact with said second portion of said first layer.
Claim 13
Dependent Claim
243 words
A process for forming a semiconductor device comprising: providing a semiconductor substrate having a surface; forming a first layer of polycrystalline semiconductor above said surface; covering said first layer with a second layer of oxidation resistant material and a third layer of polycrystalline semiconductor material; removing first portions of said second and third layer to expose a first portion of said first layer while second and third portions of said first layer, underlying second and third portions respectively of said second and third layers remain covered; removing said second portion of said third layer to expose said second portion of said second layer, leaving said third portion of said second layer covered and said third portion of said third layer exposed; after said step of forming said first layer of polycrystalline semiconductor and prior to said following oxidation step, doping said first layer with a dopant of a first type; oxidizing said first portion of said first layer and said third portion of said third layer to form a dielectric through said oxidized portions; removing said second portion of said second layer to expose said second portion of said first layer; depositing a third layer of polycrystalline semiconductor on said exposed second portion of said first layer; during or after said depositing step and before said following heating step, doping said third layer with a dopant of an opposite type; and heating to form a PN junction between said third and first layers.
Claim 14
Dependent Claim
243 words
A process for forming a semiconductor device comprising: providing a semiconductor substrate having a surface; forming a first layer of polycrystalline semiconductor above said surface; covering said first layer with a second layer of oxidation resistant material and a third layer of polycrystalline semiconductor material; removing first portions of said second and third layer to expose a first portion of said first layer while second and third portions of said first layer, underlying second and third portions respectively of said second and third layers remain covered; removing said second portion of said third layer to expose said second portion of said second layer, leaving said third portion of said second layer covered and said third portion of said third layer exposed; after said step of forming said first layer of polycrystalline semiconductor and prior to said following oxidation step, doping said first layer with a dopant of a first type; oxidizing said first portion of said first layer and said third portion of said third layer to form a dielectric through said oxidized portions; removing said second portion of said second layer to expose said second portion of said first layer; depositing a third layer of polycrystalline semiconductor on said exposed second portion of said first layer; during or after said depositing step and before said following heating step, doping said third layer with a dopant of an opposite type; and heating to form a PN junction between said third and first layers.
Claim 15
Dependent Claim
27 words
The process of claim 10 wherein said step of providing said semiconductor substrate comprises providing a semiconductor substrate having a dielectric surface for receiving said first layer.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.