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EP0270067A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method of making a semiconductor device comprising at least two semiconductor chips

Assignee: Sharp Corp
•
Filing: 1987-12-01
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Granted: —
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Expires: 2007-12-01
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Abstract

Abstract A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units (1,1′), which method comprises the step of forming a plurality of connecting electrodes (2,2′) on an upper surface of each of at least first and second semiconductor substrates; forming an lectrically insulating layer (3,3′) entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs (4) on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits (5) on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconduc­tor unit; combining the first and second semiconductor units with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semicon­ductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.

Inventors

  • 👤 Akiteru Rai
  • 👤 Keiji Yamamura
  • 👤 Takashi Nukii

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 07:54
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/20; H10W90/00; H10W46/00; H10W72/241; H10W72/242; H10W72/251; H10W74/00; H10W74/10; H10W74/15; H10W90/701; H10W90/721; H10W90/722; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/53; Y10T29/5313; Y10T29/53174

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 214 words
A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of; forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an lectrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; combining the first and second semiconductor units with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semicon­ductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.
Claim 2
Independent Claim 214 words
A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of; forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an lectrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; combining the first and second semiconductor units with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semicon­ductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.

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