EP0260232A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Process for making metal-semiconductor ohmic contacts
Assignee: STMicroelectronics SRL
•
Filing: 1987-07-30
•
Granted: —
•
Expires: 2007-07-30
Abstract
Abstract An improved process for making metal-semiconductor ohmic contacts comprises a de-hydrogenation heat treatment of the wafer for releasing the hydrogen "implanted" in the crystal lattice during the preceding step of "opening of the contacts" by R.I.E. plasma etch. A heat treatment at about 600 DEG C in nitrogen for few hours permits to eliminate a great part of the hydrogen from the silicon before proceeding to sputtering of a metallurgical barrier and/or of a metallization layer.
Inventors
- 👤 Fabio Gualandris
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 23:44
CPC Classifications
H; H10; H10P; H10P70/00; H10P70/20; H10P70/23; H10P70/234; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
120 words
A process for making ohmic type contacts between a metal and a semiconductor, over as many areas of the surface of a monocrystalline semiconductor wafer as defined by means of a photoresist mask and exposed by etching a layer of dielectric material through openings of said mask, comprising the following steps: 1) R.I.E. plasma etching the layer of dielectric material through the openings of said mask with a certain overetch; 2) removing the residual masking photoresist; 3) heat treating the wafer at a temperature comprised between 450 and 700°C under inert atmosphere and for a period of time comprised between 1 and 4 hours; 4) depositing by sputter deposition a layer of at least a material having a metallic conductivity.
Claim 2
Dependent Claim
120 words
A process for making ohmic type contacts between a metal and a semiconductor, over as many areas of the surface of a monocrystalline semiconductor wafer as defined by means of a photoresist mask and exposed by etching a layer of dielectric material through openings of said mask, comprising the following steps: 1) R.I.E. plasma etching the layer of dielectric material through the openings of said mask with a certain overetch; 2) removing the residual masking photoresist; 3) heat treating the wafer at a temperature comprised between 450 and 700°C under inert atmosphere and for a period of time comprised between 1 and 4 hours; 4) depositing by sputter deposition a layer of at least a material having a metallic conductivity.
Claim 3
Dependent Claim
12 words
The process according to claim 1, wherein said semiconductor material is silicon.
Claim 4
Dependent Claim
35 words
The process according to claim 1, wherein said material having a metallic conductivity is multilayered and comprises a first barrier layer of titanium, a second layer of titanium nitride and a third layer of aluminum.
Claim 5
Dependent Claim
15 words
The process according to claim 1, wherein said overetch is comprised between 30 and 35%.
Claim 6
Dependent Claim
37 words
The process according to claim 1, wherein after said heat treatment under inert atmosphere and before the sputter deposition, said wafer is subjected to a plasma etch in a plasma of C₂F₆ + He for few seconds.
Claim 7
Dependent Claim
32 words
The process according to claim 5, wherein after said plasma etch treatment the wafer is subjected to an acid wash in a diluted solution of phosphoric acid, ammonium fluoride and ammonium phosphate.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.