← Back to Patent Explorer
EP0257655A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Multitask processing apparatus

Assignee: NEC Corp
•
Filing: 1987-08-28
•
Granted: —
•
Expires: 2007-08-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A multitask processing apparatus comprises a central processing unit (CPU) equipped with a microprogram memory, and a memory. A processing demand to the real time OS required for the execution of the multitask processing is treated as exclusive instruction. For this purpose, it comprises a decoder for decoding the exclusive instruction, and the CPU or the memory has a microprogram for the realization of the instruction.

Inventors

  • 👤 Hajime C/O Nec Corporation Sakuma
  • 👤 Hiroko C/O Nec Corporation Shinohara

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 20:13
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4843; G06F9/4881

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 57 words
A multitask processing apparatus comprising a central processing unit equipped with a microprogram memory, and a memory, wherein a processing demand to the real time OS required for the execution of the multitask processing is treated as exclusive instruction and wherein the processing is executed by means of the hardware resources for the execution of said instruction.
Claim 2
Dependent Claim 57 words
A multitask processing apparatus comprising a central processing unit equipped with a microprogram memory, and a memory, wherein a processing demand to the real time OS required for the execution of the multitask processing is treated as exclusive instruction and wherein the processing is executed by means of the hardware resources for the execution of said instruction.
Claim 3
Dependent Claim 91 words
A multitask processing apparatus comprising a central processing unit including therein a microprogram memory and an instruction execution unit driven in accordance with the microprogram read out from the microprogram memory, and a memory wherein the improvement is that one of the central processing unit and the memory stores a task control program for each task, so that a demand for the real time operating system for the execution of the multitask processing is given as an exclusive instruction, which can be executed by use of hardware resources in the apparatus.
Claim 4
Dependent Claim 91 words
A multitask processing apparatus comprising a central processing unit including therein a microprogram memory and an instruction execution unit driven in accordance with the microprogram read out from the microprogram memory, and a memory wherein the improvement is that one of the central processing unit and the memory stores a task control program for each task, so that a demand for the real time operating system for the execution of the multitask processing is given as an exclusive instruction, which can be executed by use of hardware resources in the apparatus.
Claim 5
Dependent Claim 68 words
An apparatus claimed in Claim 2 wherein the memory stores an application program divided into a plurality of tasks, and one of the central processing unit and the memory has memory means assigned to each of the tasks for holding various information on the task, so that when the task is saved and returned the information stored in the memory means for that task is rewritten if necessary.
Claim 6
Dependent Claim 79 words
An apparatus claimed in Claim 3 wherein the memory includes a task control block provided for each of the tasks, and wherein the central processing unit further includes a means responsive to a signal generated from the microprogram memory when the processing status of the task is changed, for generating a task control block address signal to the memory, so that the information stored in the task control block designated by said address signal can be rewritten if necessary.
Claim 7
Dependent Claim 72 words
An apparatus claimed in Claim 3 wherein the central control unit includes a register bank provided for each of the tasks, and a means responsive to a signal generated from the microprogram memory when the processing status of the task is changed, for generating a register bank designation signal to the register banks, so that the information stored in the register bank designated by said designation signal can be rewritten if necessary.
Claim 8
Dependent Claim 37 words
An apparatus claimed in Claim 2 wherein the central processing unit includes a ready queue for holding identifiers of executable tasks in the order of priority, so that the tasks are processed in the order of priority.
Claim 9
Dependent Claim 50 words
An apparatus claimed in Claim 6 wherein the central processing unit further includes task control blocks provided for each of the tasks so as to hold at least the task status, and a mailbox provided for each of the tasks so as to managing the identifier for a given task.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag