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EP0257119A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Integrated wiring system for VLSI

Assignee: IBM Deutschland GmbH
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Filing: 1986-08-22
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Granted: —
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Expires: 2006-08-22
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Abstract

Abstract An integrated (silicon based) packaging/wiring concept provides for the VLSI chips (4) to be placed within openings of somewhat larger size in a semiconductor interconnection wafer (IW, 2) supported by a carrier (1). The interconnection wafer (2) bears multilevel (ML) wiring planes and has incorporated circuit components integrated in a less demanding technology as compared to the VLSI chips (4). Silicon contact chips (5) with conductive surface layers (22, 23) placed over the chip/IW plane provide for the required interconnections by means of needle- like structures (24) inserted in corresponding via holes which needles are better suited as to shear strain encountered with conventional C-4 (Controlled Collapse Chip Connection) joints; con­sequently a much higher number of chip pads can be allowed. Power supply is effected via rather large-­dimensioned conductive planes, e.g. in the form of Cu rails (20), running within the carrier (1) and surfacing stud-like (at 21) in the peripheral region of said openings in the interconnection wafer (2) for further distribution via the contact chip (5). The wiring system can be supplemented, if required, with an additional wiring wafer (6).

Inventors

  • 👤 Arnold Dipl.-Ing. Blum
  • 👤 Marian Dipl.-Ing. Briska
  • 👤 Knut Dipl.-Ing. Najmann

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-02 09:39
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/69; H10W70/698; H10W90/00; H10W90/20; H10W90/28; H10W90/401; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W72/50; H10W72/531; H10W72/5363

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 173 words
Integrated wiring system for VLSI circuit chips comprising : -a carrier structure (1) adapted for cooling and housing buried power supply rails (20; GND, +V); - a semiconductor interconnection wafer (IW, 2) with multilevel wiring planes and adapted to include integrated circuit components to be formed by a less demanding process compared to that of the VLSI chips, - the interconnection wafer being formed with openings (3) for receiving the VLSI chip (4) in their active-side-up position, - the openings (3) being larger in size than the VLSI chips so that along the periphery there is space for the buried power rails to surface from the underlying carrier; - a contact chip (5) adapted to be formed by (silicon) micro-machining methods and positioned above the VLSI chip/IW plane, the contact chip having conductive surface layers (e.g. 22, 23; 84, 85) providing for the required wiring interconnection between the VLSI chips and/or the interconnection wafer by means of contact needles (24; 90) inserted in corresponding via holes (e.g. 80, 81) in the contact chip.
Claim 2
Dependent Claim 173 words
Integrated wiring system for VLSI circuit chips comprising : -a carrier structure (1) adapted for cooling and housing buried power supply rails (20; GND, +V); - a semiconductor interconnection wafer (IW, 2) with multilevel wiring planes and adapted to include integrated circuit components to be formed by a less demanding process compared to that of the VLSI chips, - the interconnection wafer being formed with openings (3) for receiving the VLSI chip (4) in their active-side-up position, - the openings (3) being larger in size than the VLSI chips so that along the periphery there is space for the buried power rails to surface from the underlying carrier; - a contact chip (5) adapted to be formed by (silicon) micro-machining methods and positioned above the VLSI chip/IW plane, the contact chip having conductive surface layers (e.g. 22, 23; 84, 85) providing for the required wiring interconnection between the VLSI chips and/or the interconnection wafer by means of contact needles (24; 90) inserted in corresponding via holes (e.g. 80, 81) in the contact chip.
Claim 3
Dependent Claim 49 words
The wiring system as in claim 1 further comprising a high performance wiring wafer (6) provided over the plane containing the contact chips (5) and being similar in its material and structure to a contact chip but providing low-ohmic low-capacitance interconnection compared to those on the interconnection wafer (2).
Claim 4
Dependent Claim 28 words
The wiring system as in claims 1 or 2 whereby the material of its component substrates such as for the interconnection wafer, the contact chip etc. is silicon.
Claim 5
Dependent Claim 30 words
The wiring system as in one of the preceding claims wherein the interconnection wafer (2) is provided with driver stages including those which are conventionally placed on the VLSI chips.
Claim 6
Dependent Claim 35 words
The wiring system as in one of the preceding claims wherein the interconnection wafer (2) contains driver stages located in the vicinity of the openings (3) provided for the accomodation of the VLSI chips (4).
Claim 7
Dependent Claim 57 words
The wiring system as in one of the preceding claims where there is a hierarchy order of decreasing technology demands such as in terms of minimum allowable line width from the VLSI chips (4) over the interconnection wafer (2) and the contact chip (5) to the high performance wiring wafer (6), if provided, and the carrier (1).
Claim 8
Dependent Claim 56 words
The wiring system as in one of the preceding claims wherein the contact chip (5) is provided on its surface with solder rings (82, 83) at the periphery of corresponding via holes (80, 81) and adapted to selectively establish a contact between that wiring plane and the contact needle in a particular via hole (Fig. 8B).
Claim 9
Dependent Claim 63 words
The wiring system as in claim 7 wherein the opening in the solder ring (82) covering a via hole (80, 81) is smaller than the via hole diameter thus providing an "overhang" (86, 87) for holding a contact needle inserted in a via hole in a position allowing to adjust for different contact pad heights on the underlying wiring level (Figs. 8B, 9).
Claim 10
Dependent Claim 37 words
The wiring system of one of the preceding claims wherein the contact needles (24, 90) of a contact chip (5) are of a steel-like and shear strain absorbing material being coated with a solder material like PbSn.
Claim 11
Dependent Claim 29 words
The wiring system as in one of the preceding claims wherein the via holes in the contact chip (5) are formed by thermomigration doping followed by etching (Fig. 11).
Claim 12
Dependent Claim 32 words
The wiring system as in claim 10 wherein the via holes are formed by Al-thermomigration through a < 100 > oriented silicon wafer (110) followed by etching in a solution comprising HNO₃:HF:CH₃COOH.
Claim 13
Dependent Claim 30 words
The wiring system as in one of claims 2 to 11 wherein the high performance wiring wafer (6) is provided with openings (7) in areas of underlying contact chips (5).
Claim 14
Dependent Claim 38 words
The wiring system as in one of claims 2 to 12 wherein the high performance wiring wafer (6) is provided with metal wiring layers on its surfaces being organized to form interconnection substantially in X- and Y-direction, respectively.
Claim 15
Dependent Claim 79 words
The wiring system as in one of the preceding claims wherein the carrier (1) is provided with recesses or slots (50, 51) adapted for accomodation of the power planes or rails (20; GND, +V) which rails are formed to extend from the carrier body to the surface to allow for contacts to be made to the power rails in a manner similar to the contacts made to pads on the VLSI chips (4) and the interconnection wafer (2), respectively.
Claim 16
Dependent Claim 28 words
The wiring system as in one of the preceding claims wherein the carrier (1) is of a material selected from the group comprising silicon, silicon carbide, ceramic, copper.
Claim 17
Dependent Claim 34 words
The wiring system as in one of the preceding claims wherein the carrier (1) itself is adapted to act as a power plane for one of the supply potentials such as the ground potential.
Claim 18
Dependent Claim 39 words
The wiring system as in one of the preceding claims further comprising a mounting frame (8), preferably of a multilayer ceramic, which frame is adapted to accomodate the integrated wiring system and to provide for its external electrical accessibility.
Claim 19
Dependent Claim 24 words
The wiring system as in one of the preceding claims further comprising a cap (9) for protection and external supply connection to the package.
Claim 20
Dependent Claim 51 words
The wiring system as in one of the preceding claims wherein in the openings (3) of the interconnection wafer (2) VLSI chips (4) of different technology type such as MOS/CMOS/ECL/GaAs are provided to form a resultant complex system which takes advantage of the particular circuit properties of that specific technology type.

References Cited (Backward Citations)

US3777221A Cited
FR2295570A1 Cited
DE3511722A1 Cited
FR2569052A1 Cited

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