Data package communication systems

Claim 2

A data package communication system having a system bus coupling interchangeable or assorted I/O units to a system storage unit, wherein is provided line size means for broadcasting to the I/O units a line size signal representing the current line size of the system storage unit; and package control means located in or provided for the or each I/O unit and responsive to the line size signal for adjusting the current data transfer size of the I/O unit to match the signalled system storage unit line size.

Claim 3

A system as claimed in claim 1 wherein the line size signal is a plural-bit binary coded signal representing the amount of data stored into the system storage unit for which there is provided an accompanying error checking and correction code segment for error checking and correction purposes.

Claim 4

A system as claimed in either preceding claim 1 wherein the line size signal is supplied via separate dedicated signal conductors associated with the system bus.

Claim 5

A system as claimed in claim 1 or claim 2 wherein the line size signal is supplied via a status byte transferred over the system bus to the I/O control units.

Claim 9

An I/O unit for use in a data processing system as claimed in any preceding claim and having a bus arbitration mechanism for receiving request signals from I/O units and supplying an acknowledgement signal to a selected I/O unit, wherein the package control means is incorporated therein and comprises address register means for holding a system storage unit starting address; buffer means for holding a plurality of data words; bus request means for coupling to the system bus for requesting use of the bus by the I/O unit; bus acknowledgement means for coupling to the system bus for receiving an acknowledgement signal granting use of the system bus to the I/O unit; first logic means coupled to the address register means and to the buffer means and responsive to a received acknowledgement signal for causing a transfer of a starting address from the address register means to the system bus and for causing a sequential transfer of a plurality of data words between the system bus and the buffer means; and second logic means coupled to the first logic means and responsive to the line size signal for limiting the number of data words transferred with the starting address so that the number of data words transferred does not exceed the line size of the system storage unit.

Claim 10

An I/O unit as claimed in claim 8 wherein the second logic means adjusts the number of data words transferred with the starting address so that the number of data words transferred matches the line size of the system storage unit.

Claim 11

An I/O unit for use in a data processing system as claimed in any of claims 1 to 7 and having a bus arbitration mechanism for receiving request signals from I/O units and supplying an acknowledgement signal to a selected I/O unit, wherein the package control means is incorporated therein and comprises address register means for holding a system storage unit starting address; buffer means for holding a plurality of data words; bus request means for coupling to the system bus for requesting use of the bus by the I/O unit; bus acknowledgement means for coupling to the system bus for receiving an acknowledgement signal granting use of the system bus to the I/O unit; packet transfer control means coupled to the address register means and to the buffer means and responsive to each received acknowledgement signal for causing a transfer of a data packet between the I/O unit and the system storage unit, each such data packet being comprised of a system storage unit starting address field followed by a sequence of data words; and packet size adjusting means coupled to the first logic means and responsive to the line size signal for adjusting the number of data words in each full packet to match the line size of the system storage unit.