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EP0251530A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Improvements relating to amplifier gain control circuit arrangements

Assignee: BAE Systems Electronics Ltd
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Filing: 1987-06-11
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Granted: —
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Expires: 2007-06-11
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Abstract

Abstract A gain control circuit arrangement comprises a transistor amplifier (A) for providing an output signal (OP) in response to a received input signal (IP). The gain of the transistor amplifier (A) is controlled by means of a field effect transistor (TF) connected in the emitter circuit of the amplifier and included in a feedback control loop to which a gain control signal (Ref A) is applied in operation of the gain control arrangement. A collector load of the amplifier comprises a potential divider (R1 and R2) one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.

Inventors

  • 👤 Adrian Jarrett

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-07 15:53
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G1/00; H03G1/0005; H03G1/0035; H03G1/007; H03G1/04

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 107 words
A gain control circuit arrangement comprising a transistor amplifier for providing an output signal in response to a received input signal in which the gain of the transistor amplifier is controlled by means of a field effect transistor connected in an emitter circuit of the transistor amplifier and included in a feedback control loop to which a gain control signal will be applied in operation of the gain control arrangement and in which a collector load of the transistor amplifier comprises a potential divider one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.
Claim 2
Dependent Claim 107 words
A gain control circuit arrangement comprising a transistor amplifier for providing an output signal in response to a received input signal in which the gain of the transistor amplifier is controlled by means of a field effect transistor connected in an emitter circuit of the transistor amplifier and included in a feedback control loop to which a gain control signal will be applied in operation of the gain control arrangement and in which a collector load of the transistor amplifier comprises a potential divider one portion of which is shunted by a control loop which serves to maintain constant the collector current passing through the transistor amplifier.
Claim 3
Dependent Claim 40 words
A gain control circuit arrangement as claimed in claim 1, in which the gain control signal applied to the feedback control loop controls the effective resistance of the field effect transistor which in turn controls the gain of the amplifier.
Claim 4
Dependent Claim 38 words
A gain control circuit arrangement as claimed in claim 2 in which the feedback control loop comprises resistor and capacitor means and a comparator for comparing the gain control signal with the voltage across the field effect transistor.
Claim 5
Dependent Claim 48 words
A gain control circuit arrangement as claimed in any preceding claim in which a linearising control loop feedback arrangement is provided to linearise the operation of the transistor amplifier with changes in temperature which can cause changes to occur in the collector and emitter current of the amplifier
Claim 6
Dependent Claim 86 words
A gain control circuit arrangement as claimed in claim 4, in which the linearising control loop feedback arrangement comprises resistor and capacitor means and a comparator which compares the voltage at the junction between resistors in the collector circuit of one of two transistors in the transistor amplifier with a control voltage and in which a resultant voltage is applied to the base of the said one transistor of the transistor amplifier to maintain the collector current in said transistor constant in spite of temperature changes.

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