Semiconductor device having a high breakdown voltage

Claim 1

A metal insulator semiconductor device having a high breakdown voltage characteristic, comprising: a semiconductor body having a first region (1, L g ) containing a first concentration of impurities of a first type; a gate electrode (5) formed above the first region (1, L g ); a source region (7), formed in the body adjacent to the first region (1, L g ), containing a second concentration of impurities of a second type, opposite to the first type; a drain region (8), formed in the body, containing impurities of the second conductivity type to the second concentration, the drain region (8) being formed opposite to the source region (7) with regard to the gate electrode (5) so that a side edge of the drain region, facing the source region, is separated by a first space (L OF ) from the first region (1, L g ); a first offset region (6, 6A) formed adjacent to the drain region (8) to occupy the first space (L OF ), the first offset region containing impurities of the second conductivity type to a third concentration, lower than the second concentration; at least one depletion region (14), formed in the first region (1, L g ) so as to be adjacent to the first offset region (6, 6A), the depletion region (14) containing impurities of the second conductivity type to a fourth impurity concentration, lower than the third impurity concentration, and a side edge of the depletion region (14), facing the source region (7), being positioned so as to be separated by a second space (L ch ) from the source region; and an enhancement type channel region (16) formed in said first region (1, L g ) so as to fill up said second space (L ch ), said channel region containing impurities of the first conductivity type to a fifth impurity concentration, higher than said first impurity concentration.

Claim 5

A method for fabricating a metal insulator semiconductor device having a high breakdown voltage characteristic comprising the steps of: providing a first semiconductor substrate region (1) containing a first impurity concentration of impurities of a first type; forming a fourth region (114) containing impurities of a second type, opposite to the first type, to a fourth impurity concentration, in the first region; forming a gate electrode (5) above the fourth region; forming a fifth region (15), with impurities of the first type to a fifth impurity concentration, in the first region (1), adjacent to one side of the gate electrode (5), by doping first type impurities into the fourth region (114) in alignment with the gate electrode, the fifth impurity concentration being higher than said first impurity concentration; inverting the conductivity type of a part of the fourth region (114) neighbouring the fifth region (15) and under the gate electrode (5), so as to have the fifth impurity concentration, by laterally diffusing the fifth region so that the fifth region extends laterally by a second length (L ch ), in direction from the said one side of the gate electrode (5) to the opposite side of the gate electrode; forming a third region (6, 6A, 6B), having a third impurity concentration of impurities of the second type, in the first region (1) adjacent to the said opposite side of the gate electrode (5), by doping impurities of the second type into the fourth region (114), in alignment with the gate electrode (5), the third impurity concentration being higher than the fourth impurity concentration; and forming two second regions, to provide a source region (7) and a drain region (8) respectively, having a second impurity concentration of impurities of the second type by doping impurities of the second type into the fifth region (15) to form the source region (7) and into the third region (6, 6A, 6B) to form the drain region (8), in alignment with the gate electrode (5), the second impurity concentration being higher than the third impurity concentration, the source region (7) being formed on the said one side of said gate electrode (5) and the drain region (8) being formed on the said opposite side of the gate electrode (5) spaced apart from the gate electrode (5), an edge, facing the drain region, of the gate electrode and an edge, facing the gate electrode, of the drain region being spaced apart.

Claim 6

A method for fabricating a metal insulator semiconductor device having a high breakdown voltage characteristic comprising the steps of: providing a first semiconductor substrate region (1) containing a first impurity concentration of impurities of a first type; forming a fourth region (114) containing impurities of a second type, opposite to the first type, to a fourth impurity concentration, in the first region; forming a gate electrode (5) above the fourth region; forming a fifth region (15), with impurities of the first type to a fifth impurity concentration, in the first region (1), adjacent to one side of the gate electrode (5), by doping first type impurities into the fourth region (114) in alignment with the gate electrode, the fifth impurity concentration being higher than said first impurity concentration; inverting the conductivity type of a part of the fourth region (114) neighbouring the fifth region (15) and under the gate electrode (5), so as to have the fifth impurity concentration, by laterally diffusing the fifth region so that the fifth region extends laterally by a second length (L ch ), in direction from the said one side of the gate electrode (5) to the opposite side of the gate electrode; forming a third region (6, 6A, 6B), having a third impurity concentration of impurities of the second type, in the first region (1) adjacent to the said opposite side of the gate electrode (5), by doping impurities of the second type into the fourth region (114), in alignment with the gate electrode (5), the third impurity concentration being higher than the fourth impurity concentration; and forming two second regions, to provide a source region (7) and a drain region (8) respectively, having a second impurity concentration of impurities of the second type by doping impurities of the second type into the fifth region (15) to form the source region (7) and into the third region (6, 6A, 6B) to form the drain region (8), in alignment with the gate electrode (5), the second impurity concentration being higher than the third impurity concentration, the source region (7) being formed on the said one side of said gate electrode (5) and the drain region (8) being formed on the said opposite side of the gate electrode (5) spaced apart from the gate electrode (5), an edge, facing the drain region, of the gate electrode and an edge, facing the gate electrode, of the drain region being spaced apart.