Patent US5046870A successfully refreshed from Google Patents.
EP0245504A1
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EP
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Image processor
Assignee: Fanuc Corp
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Filing: 1986-08-07
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Granted: —
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Expires: 2006-08-07
Abstract
Abstract A processor for image processing (1), a frame memory (2), an A/D converter (3) bus receivers (4,9), a window memory (5), a CRT controller (6), a host CPU (7), a bus (8) and a DMA bus (10) are provided. An analog signal from a video camera is converted into a digital signal and stored in the frame memory. Image processing is performed only on the pixels which are designated by bit patterns stored in the window memory. The CRT controller (6) controls a selective operation via the window memory and displays the result on a CRT display as well as enables translation or rotation of the bit pattern.
Inventors
- 👤 Mitsuo Kurakake
- 👤 Shoichi Otsuka
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 21:00
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/20; G06T1/60; G06T2200/00; G06T2200/28
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
96 words
A picture processing apparatus for displaying on a display device a picture obtained from a sensor, comprising: a processor for performing picture processing; a frame memory for storing a picture to be processed; a window memory of a size corresponding to said frame memory for storing a bit pattern for specifying validity or invalidity of processing performed by said processor; and a control circuit for writing picture data into said frame memory, reading out of said frame memory picture data of a bit pattern indicative of validity, and displaying the picture data on said display device.
Claim 2
Dependent Claim
96 words
A picture processing apparatus for displaying on a display device a picture obtained from a sensor, comprising: a processor for performing picture processing; a frame memory for storing a picture to be processed; a window memory of a size corresponding to said frame memory for storing a bit pattern for specifying validity or invalidity of processing performed by said processor; and a control circuit for writing picture data into said frame memory, reading out of said frame memory picture data of a bit pattern indicative of validity, and displaying the picture data on said display device.
Claim 3
Dependent Claim
27 words
A picture processing apparatus according to claim 1, wherein said control circuit has a function for translating or rotating the bit pattern stored in said window memory.
References Cited (Backward Citations)
No citation records indexed.
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