EP0240749A2
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Disk controller bus interface
Assignee: Symbolics Inc
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Filing: 1987-03-07
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Granted: —
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Expires: 2007-03-07
Abstract
Abstract In a symbolic processing system, a standard disk controller chip which operates with 16 bit words is first converted into 32 bit words and is thereafter converted in the system processor to 36 bit words for storage in main memory. The conversion by the processor is carried out by breaking up at least one 32 bit word to form eight 36 bit words from nine 32 bit words.
Inventors
- 👤 David A. Moon
- 👤 Logan P. Palmer
- 👤 Barton H. Gawboy
- 👤 Ronald J. Lebel
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 17:17
CPC Classifications
G; G06; G06F; G06F3/00; G06F3/06; G06F3/0601; G06F13/00; G06F13/38; G06F13/382; G06F13/387; G06F5/00; G06F3/0668; G06F3/0671; G06F3/0673
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
90 words
In a symbolic processing system having a main memory for storing words of n bits in length, an I/O device operating with words of m bits in length wherein m<n, and a microprogrammable processor through which words are transferred between the I/O device and the memory over a bus, the improvement wherein the processor comprises means for converting the m bit words into n bit words for storage in memory including means for periodically adding increasing multiples of n-m bits of a next word to the current word being stored.
Claim 2
Dependent Claim
90 words
In a symbolic processing system having a main memory for storing words of n bits in length, an I/O device operating with words of m bits in length wherein m<n, and a microprogrammable processor through which words are transferred between the I/O device and the memory over a bus, the improvement wherein the processor comprises means for converting the m bit words into n bit words for storage in memory including means for periodically adding increasing multiples of n-m bits of a next word to the current word being stored.
Claim 3
Dependent Claim
139 words
The system according to claim 1, wherein the I/O device operates with 16 bit words and the memory stores 36 bit words, further comprising an interface buffer memory for storing each pair of 16 bit words as a 32 bit word and for transferring the 32 bit word to the processor with 4 additional bits and wherein the converting means comprises register means for receiving the first 32 bit words and for adding 4 bits of the next 32 bit word thereto to form a 36 bit word, for thereafter receiving the 28 bits of said next word and adding 8 bits of the following 32 bit word thereto and thereafter repeatedly adding increasing multiples of 4 bits from the following words to the word being stored until nine 32 bit words are stored as eight 36 bit words.
Claim 4
Dependent Claim
95 words
In a symbolic processing system having a main memory for storing words of n bits in length, an I/O device operating with words of m bits in length wherein m<n, and a microprogrammable processor through which words are transferred between the I/O device and the memory over a bus, the improvement wherein the processor comprises means for converting the m bit words into n bit words for storage in memory including means for periodically breaking up one m bit word into n-m bit segments and adding a segment to each m bit word being stored.
Claim 5
Dependent Claim
95 words
In a symbolic processing system having a main memory for storing words of n bits in length, an I/O device operating with words of m bits in length wherein m<n, and a microprogrammable processor through which words are transferred between the I/O device and the memory over a bus, the improvement wherein the processor comprises means for converting the m bit words into n bit words for storage in memory including means for periodically breaking up one m bit word into n-m bit segments and adding a segment to each m bit word being stored.
Claim 6
Dependent Claim
113 words
The system according to claim 3, wherein the I/O device operates with 16 bit words and the memory stores 36 bit words, further comprising an interface buffer memory for storing each pair of 16 bit words as a 32 bit word and for transferring the 32 bit word to the processor with 4 additional bits and wherein the converting means comprises means for receiving the first 32 bit word to be stored and for breaking it up into eight 4 bit segments and means for adding one 4 bit segment to the next eight 32 bit words to be stored, whereby the nine 32 bit words are stored as eight 36 bit words.
Claim 7
Dependent Claim
86 words
In a method for symbolic processing wherein words of n bits in length are transferred through a microprogrammable processor between an I/O device and a main memory on a bus, wherein the I/O device inputs and outputs words of m bits in length, where m<n, the improvement comprising converting the m bit words of the I/O device into n bit words in the processor for storage in memory by periodically adding increasing multiples of n-m bits of a next word to the current word being stored.
Claim 8
Dependent Claim
86 words
In a method for symbolic processing wherein words of n bits in length are transferred through a microprogrammable processor between an I/O device and a main memory on a bus, wherein the I/O device inputs and outputs words of m bits in length, where m<n, the improvement comprising converting the m bit words of the I/O device into n bit words in the processor for storage in memory by periodically adding increasing multiples of n-m bits of a next word to the current word being stored.
Claim 9
Dependent Claim
91 words
In a method for symbolic processing wherein words of n bits in length are transferred through a microprogrammable processor between an I/O device and a main memory on a bus, wherein the I/O device inputs and outputs words of m bits in length, where m<n, the improvement comprising converting the m bit words of the I/O device into n bit words in the processor for storage in memory by periodically breaking up one m bit word into n-m bit segments and adding a segment to each m bit word being stored.
Claim 10
Dependent Claim
91 words
In a method for symbolic processing wherein words of n bits in length are transferred through a microprogrammable processor between an I/O device and a main memory on a bus, wherein the I/O device inputs and outputs words of m bits in length, where m<n, the improvement comprising converting the m bit words of the I/O device into n bit words in the processor for storage in memory by periodically breaking up one m bit word into n-m bit segments and adding a segment to each m bit word being stored.
References Cited (Backward Citations)
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