Linearity correcting control circuit for tunable delay line

Claim 2

A control circuit for providing an analog signal input to a tunable delay line, wherein the duration of a signal delay produced by the tunable delay is a nonlinear function of the magnitude of the analog signal, the control circuit comprising: means for storing a range of values accessible in accordance with digital input data; and means responsive to the accessed output of said storing means for producing said analog signal in proportion to said accessed output, wherein the accessed output provided in response to each magnitude of digital input data is independently determined such that the duration of the time delay produced by the tunable delay line is a substantially linear function of the digital input data.

Claim 3

A control circuit for providing a control signal input to a tunable delay line, wherein the duration of a signal delay produced by the tunable delay line is a nonlinear function of the magnitude of the control signal, the control signal magnitude being controlled by the magnitude of digital input data applied to the control circuit, the control circuit comprising: means for generating a gross adjustment signal of magnitude an adjustable first function of a first portion of the digital input data; means for generating a reference signal of magnitude an adjustable second function of said first portion of the digital input data; means for generating a fine adjustment signal of magnitude which is proportional to the product of said reference signal and a second por­tion of the digital input data; and means for combining the gross adjustment signal and the fine adjustment signal to produce the control signal input to the tunable delay line.

Claim 4

A control circuit for providing a control signal input to a tunable delay line, wherein the duration of a signal delay produced by the tunable delay line is a nonlinear function of the magnitude of the control signal, the control signal magnitude being controlled by the magnitude of digital input data applied to the control circuit, the control circuit comprising: means for generating a gross adjustment signal of magnitude an adjustable first function of a first portion of the digital input data; means for generating a reference signal of magnitude an adjustable second function of said first portion of the digital input data; means for generating a fine adjustment signal of magnitude which is proportional to the product of said reference signal and a second por­tion of the digital input data; and means for combining the gross adjustment signal and the fine adjustment signal to produce the control signal input to the tunable delay line.

Claim 5

The circuit according to claim 2 wherein the first function is adjusted such that the dura­tion of the signal delay produced by the tunable delay line is a linear function of the magnitude of the first portion of the digital input data when the second portion of the digital input data has zero magnitude.

Claim 6

The circuit according to claim 3 wherein the first and second functions are adjusted such that the magnitude of the control signal generated by the control circuit is a piecewise continuous linear function of the magnitude of the digital input data.

Claim 7

The circuit according to claim 2 wherein the means for generating a gross adjustment signal comprises: memory means for outputting stored gross adjustment data when addressed by the first portion of the digital input data; and means for converting the gross adjustment data output of the memory means into the gross adjustment signal of magnitude proportional to the gross adjustment data.

Claim 8

The circuit according to claim 2 wherein the means for generating a reference signal comprises: memory means for outputting stored reference data when addressed by the first portion of the digital input data; and means for converting the reference data output of the memory means into the reference signal of magnitude proportional to the reference data.

Claim 9

The circuit according to claim 2 wherein the means for generating a fine adjustment signal of magnitude which is proportional to the product of the reference signal and the magnitude of the second portion of the digital data comprises a digital to analog converter, the reference signal being applied as a reference voltage input and the second portion of the digital data being applied as a digital input to the digital to analog converter.

Claim 10

A control circuit for providing an analog control signal input to a tunable delay line, wherein the duration of a signal delay produced by the tunable delay line is a nonlinear function of the magnitude of the control signal, the control signal magnitude being controlled by the magnitude of digital input data applied to the control circuit, the control circuit comprising: means responsive to a first portion of the digital input data for producing gross adjustment data of magnitude of an adjustable first relation to a first portion of the digital input data; means for converting the gross adjustment data into an analog gross adjustment signal of magnitude proportional to the gross adjustment data; means responsive to the first portion of the digital input data for producing reference data of magnitude of an adjustable second to the first portion of the digital data; means for converting the reference data into an analog reference signal of magnitude proportional to the reference data; means for generating an analog fine ad­justment signal of magnitude proportional to the product of the reference signal and a second por­tion of the digital input data; and means for combining the gross adjustment signal and the fine adjustment signal to produce the control signal input to the tunable delay line.

Claim 11

A control circuit for providing an analog control signal input to a tunable delay line, wherein the duration of a signal delay produced by the tunable delay line is a nonlinear function of the magnitude of the control signal, the control signal magnitude being controlled by the magnitude of digital input data applied to the control circuit, the control circuit comprising: means responsive to a first portion of the digital input data for producing gross adjustment data of magnitude of an adjustable first relation to a first portion of the digital input data; means for converting the gross adjustment data into an analog gross adjustment signal of magnitude proportional to the gross adjustment data; means responsive to the first portion of the digital input data for producing reference data of magnitude of an adjustable second to the first portion of the digital data; means for converting the reference data into an analog reference signal of magnitude proportional to the reference data; means for generating an analog fine ad­justment signal of magnitude proportional to the product of the reference signal and a second por­tion of the digital input data; and means for combining the gross adjustment signal and the fine adjustment signal to produce the control signal input to the tunable delay line.

Claim 12

The circuit according to claim 8 wherein the first relation is adjusted such that the delay time of the tunable delay line is a linear function of the magnitude of the first portion of the digital input data when the second portion of the digital input data is zero.

Claim 13

The circuit according to claim 8 wherein the first and second relations are adjusted such that the magnitude of the control signal generated by the control circuit is a piecewise linear function of the digital input data.

Claim 16

An apparatus according to claim 11 wherein the duration of the last mentioned delay time is a nonlinear function of the magnitude of the analog signal and wherein the means for generating the analog signal comprises: means for storing a range of values accessible in accordance with said different portion of the digital data; and means responsive to the accessed output of said storing means for producing said analog signal in proportion to said accessed output, wherein the accessed output provided in response to each magnitude of said different portion of digital input data is independently adjustable such that the duration of time delay is a substantially linear function of digital input data