Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
47 words
A circuit comprising a transistor having a base (16), an emitter (22, 28), and a collector (11), characterized by: a Zener diode, the cathode (36) of the Zener diode being formed within the emitter (22, 28) and, the emitter (22) forming the anode of the Zener diode.
Claim 2
Dependent Claim
47 words
A circuit comprising a transistor having a base (16), an emitter (22, 28), and a collector (11), characterized by: a Zener diode, the cathode (36) of the Zener diode being formed within the emitter (22, 28) and, the emitter (22) forming the anode of the Zener diode.
Claim 3
Dependent Claim
15 words
A circuit according to claim 1 characterized in that the transistor is a vertical transistor.
Claim 4
Dependent Claim
17 words
A circuit according to claim 1 or 2 characterized in that the transistor is a PNP transistor.
Claim 5
Dependent Claim
25 words
A circuit according to claim 1, 2 or 3 characterized in that the collector (11) and base (16) of the transistor are coupled to ground.
Claim 6
Dependent Claim
20 words
A circuit according to claim 4 characterized in that the collector (11) and base (16) are resistively coupled to ground.
Claim 7
Dependent Claim
19 words
A circuit according to any preceding claim characterized in that collector (11) is the substrate of a semiconductor wafer.
Claim 8
Dependent Claim
16 words
A circuit according to any preceding claim characterized in that the Zener diode exhibits subsurface breakdown.
Claim 9
Dependent Claim
155 words
A semiconductor device having a major surface and comprising a first semiconductor region (11) of a first conductivity type, the first semiconductor region serving as the collector of a transistor, a second semiconductor region (16) having a second conductivity type opposite to the first conductivity type, the second semiconductor region serving as the base of the transistor, and a third semiconductor region (22) of the first conductivity type formed within the second semiconductor region, the third semiconductor region serving as at least a portion of the emitter (22) of the transistor, characterized in that the third semiconductor region also serves as the anode of a Zener diode, the semiconductor device comprises a fourth semiconductor region (36) formed above the third semiconductor region, the fourth semiconductor region being of the second conductivity type and serving as the cathode of the Zener diode, the junction (29) between the third and fourth regions being below the major surface.
Claim 10
Dependent Claim
155 words
A semiconductor device having a major surface and comprising a first semiconductor region (11) of a first conductivity type, the first semiconductor region serving as the collector of a transistor, a second semiconductor region (16) having a second conductivity type opposite to the first conductivity type, the second semiconductor region serving as the base of the transistor, and a third semiconductor region (22) of the first conductivity type formed within the second semiconductor region, the third semiconductor region serving as at least a portion of the emitter (22) of the transistor, characterized in that the third semiconductor region also serves as the anode of a Zener diode, the semiconductor device comprises a fourth semiconductor region (36) formed above the third semiconductor region, the fourth semiconductor region being of the second conductivity type and serving as the cathode of the Zener diode, the junction (29) between the third and fourth regions being below the major surface.
Claim 11
Dependent Claim
60 words
A circuit according to claim 8 characterized by a fifth semiconductor region (28) of the first conductivity type, the fifth semiconductor region laterally surrounding the fourth semiconductor region (36) and serving as part of the emitter of the transistor, the breakdown voltage of the PN junction between the third and fourth semiconductor regions so that the diode exhibits subsurface breakdown.
Claim 12
Dependent Claim
24 words
A circuit according to claim 8 or 9 characterized in that the second semiconductor region (16) is formed within the first semiconductor region (11).
Claim 13
Independent Claim
156 words
A method of forming a circuit comprising the steps of forming within a substrate of a first conductivity type a first region of a second conductivity type opposite to the first conductivity type, forming within the first region a second region of the first conductivity type, forming within the first region a third region, the third region being of the first conductivity type, said third region laterally surrounding said second region, said third region having a lower dopant concentration than said second region, characterized by the steps of: forming within the third region a fourth region of the second conductivity type, a subsurface junction being formed between the fourth region and the second region, a junction also being formed between the third and fourth regions, Zener diode breakdown being confined to the junction between the second and fourth regions, and coupling the substrate and the first region to a first node for receiving a reference voltage.
Claim 14
Independent Claim
156 words
A method of forming a circuit comprising the steps of forming within a substrate of a first conductivity type a first region of a second conductivity type opposite to the first conductivity type, forming within the first region a second region of the first conductivity type, forming within the first region a third region, the third region being of the first conductivity type, said third region laterally surrounding said second region, said third region having a lower dopant concentration than said second region, characterized by the steps of: forming within the third region a fourth region of the second conductivity type, a subsurface junction being formed between the fourth region and the second region, a junction also being formed between the third and fourth regions, Zener diode breakdown being confined to the junction between the second and fourth regions, and coupling the substrate and the first region to a first node for receiving a reference voltage.