EP0232133A2
Expired / Lapsed
EP
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Digital signal error correction
Assignee: Sony Corp
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Filing: 1987-01-29
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Granted: —
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Expires: 2007-01-29
Abstract
Abstract An error correcting system in which received digital data is subjected to correcting processes by first and second error correction codes alternately is provided with memories to store first and second series error pointers for a plurality of series of the first and second error correction codes, and such first and second series error pointers are read to determine which series are without error, whereupon the correcting processes of the first and second correction codes are omitted with respect to the error-free series. As a result, the number of times effective correcting processes can be repeated within a limited time is increased and the correcting capability can be substantially improved.
Inventors
- 👤 Hisayoshi C/O Sony Corporation Moriwaki
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-08 22:10
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
174 words
An apparatus for correcting errors in received digital data signals having parity series and CRC codes, characterised in that it comprises: word error pointer memory means (5) for storing word error pointers generated on the basis of the CRC codes included in said received digital signals; parity series error pointer memory means (11, 12) for storing series error pointer of predetermined parity series of said received digital signals; means (3, 6) for reading out said word error pointers of said predetermined parity series from said word error pointer memory means (11, 12); counting means (8) for determining how many of said word error pointers read from said word error pointer memory means indicate error words; means (7) for correcting errors included in said received digital signals of said predetermined parity series when only one of said word error pointers read from said word error pointer memory means (5) indicates an error word; and' means (15) for clearing the series error pointer for the error corrected series from said parity series error pointer memory means.
Claim 2
Independent Claim
174 words
An apparatus for correcting errors in received digital data signals having parity series and CRC codes, characterised in that it comprises: word error pointer memory means (5) for storing word error pointers generated on the basis of the CRC codes included in said received digital signals; parity series error pointer memory means (11, 12) for storing series error pointer of predetermined parity series of said received digital signals; means (3, 6) for reading out said word error pointers of said predetermined parity series from said word error pointer memory means (11, 12); counting means (8) for determining how many of said word error pointers read from said word error pointer memory means indicate error words; means (7) for correcting errors included in said received digital signals of said predetermined parity series when only one of said word error pointers read from said word error pointer memory means (5) indicates an error word; and' means (15) for clearing the series error pointer for the error corrected series from said parity series error pointer memory means.
Claim 3
Dependent Claim
65 words
An apparatus according to claim 1; further comprising pointer discriminating means (16) for checking the series error pointers stored in said parity series error pointer memory means (11, 12), and being operative, when the checked series error pointer shows no error, to check the next series error pointer without reading out the corresponding word error pointers from said word error pointer memory means (11, 12).
Claim 4
Dependent Claim
46 words
An apparatus according to claim 1 or 2; wherein, in use, all of said series error pointers in said parity series error pointer memory means (11, 12) are set at the beginning of an error correcting operation on a predetermined amount of said received digital data.
Claim 5
Dependent Claim
39 words
An apparatus according to claim 1, 2 or 3; wherein said clearing means (15) also clears the corresponding series error pointer when said counting means shows no error in the words .corresponding to the read out word error pointers.
Claim 6
Independent Claim
119 words
A method for correcting errors in received digital data signals having parity series and CRC codes, characterised by comprising the steps of: storing word error pointers generated on the basis of the CRC codes included in said received digital signals; storing series error pointers of predetermined parity series of the received digital signals; reading the stored word error pointers of said predetermined parity series; determining how many of said word error pointers which are read indicate error words; correcting errors included in the received digital signals of said predetermined parity series when only one error word is indicated by the word error pointers which are read; and clearing the stored series error pointer corresponding to the error corrected series.
Claim 7
Independent Claim
119 words
A method for correcting errors in received digital data signals having parity series and CRC codes, characterised by comprising the steps of: storing word error pointers generated on the basis of the CRC codes included in said received digital signals; storing series error pointers of predetermined parity series of the received digital signals; reading the stored word error pointers of said predetermined parity series; determining how many of said word error pointers which are read indicate error words; correcting errors included in the received digital signals of said predetermined parity series when only one error word is indicated by the word error pointers which are read; and clearing the stored series error pointer corresponding to the error corrected series.
Claim 8
Dependent Claim
48 words
A method according to claim 5; further comprising the steps of checking one of the stored series error pointers and, when the checked series error pointer shows no errors in any of the corresponding words, checking the next series error pointer without reading the stored word error pointers.
Claim 9
Dependent Claim
35 words
A method according to claim 5 or 6; in which all of said series error pointers are set at the initiation of the error correcting operation on a predetermined amount of said received digital data.
Claim 10
Dependent Claim
30 words
A method according to claim 5, 6 or 7; further comprising also clearing the corresponding series error pointer when the word error pointers which are read indicate no word errors.
References Cited (Backward Citations)
No citation records indexed.
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