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EP0229692A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Data processing apparatus

Assignee: International Business Machines Corp
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Filing: 1987-01-08
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Granted: —
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Expires: 2007-01-08
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Abstract

Abstract An apparatus and method are provided for disabling the clocking of a processor in a battery operated computer during non-processing times. The clocking is disabled at the conclusion of a processing operation. The clocking can then be re-enabled using interrupts from any one of a plurality of sources, such as an I/O device or a direct memory access. Application programs and operating system programs running on the system can specify the stopping of the system clock and the central processor until a specified event which had been requested occurs, or until an optional time-out period has expired. In this situation, the event is defined as one that results in either a system interrupt from an I/O device or from a direct memory access operation. The stopping of the system clock is a two part operation wherein in the first part the stopping mechanism is first armed. If an interrupt is received subsequent to arming, then it will be processed and the arming mechanism will be reset. However, if an interrupt does not occur after arming within a specified time period, then the system clock will be stopped.

Inventors

  • 👤 Michael Norman Day

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-24 20:46
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/26; G06F1/32; G06F1/3203; G06F1/3206; G06F1/3215

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 69 words
An information processing system including a memory, a processor, at least one I/O device, and a clock for providing a clock signal to the processor, comprising: means for stopping the clock signal to the processor; means for detecting an interrupt generated by an I/O device or a request for memory access; and, means for restarting a clock signal to the processor in response to the detection of said interrupt.
Claim 2
Dependent Claim 69 words
An information processing system including a memory, a processor, at least one I/O device, and a clock for providing a clock signal to the processor, comprising: means for stopping the clock signal to the processor; means for detecting an interrupt generated by an I/O device or a request for memory access; and, means for restarting a clock signal to the processor in response to the detection of said interrupt.
Claim 3
Dependent Claim 56 words
An information processing system according to Claim 1 wherein said stopping means further comprises: means for arming the stopping means; means for detecting an interrupt subsequent to arming the stopping means and prior to stopping the clock signal; and, means for halting operation of said stopping means in response to the detection of the subsequent interrupt.
Claim 4
Dependent Claim 24 words
An information processing system according to Claim 2 further comprising means for resetting said arming means subsequent to halting operation of said stopping means.
Claim 5
Dependent Claim 44 words
An information processing system according to Claim 2 further comprising means for detecting a specific interrupt subsequent to arming the stopping means and prior to stopping the clock signal, said means halting operation of said stopping means only upon detection of said specific interrupt.
Claim 6
Dependent Claim 23 words
An information processing system according to Claim 4 further comprising means for resetting said arming means subsequent to detection of said specific interrupt.
Claim 7
Dependent Claim 32 words
An information processing system according to Claim 2 further comprising means for detecting the expiration of a predetermined time period subsequent to arming said stopping means and prior to detecting said interrupt.
Claim 8
Dependent Claim 28 words
An information processing system according to Claim 6 further comprising means for halting operation of said information processing system subsequent to the expiration of said predetermined time period.
Claim 9
Dependent Claim 25 words
An information processing system according to Claim 6 further comprising means for generating an error signal subsequent to the expiration of said predetermined time period.
Claim 10
Dependent Claim 86 words
In an information processing system including a memory, a processor, at least one I/O device, and a clock for providing a clock signal to the processor, a method for controlling the operation of said clock signal, comprising: stopping the clock signal to the processor upon completion of a processor operation; detecting an interrupt generated by an I/O device or a request for memory access subsequent to stopping said clock signal; and, restarting the clock signal to the processor in response to the detection of said interrupt.
Claim 11
Dependent Claim 86 words
In an information processing system including a memory, a processor, at least one I/O device, and a clock for providing a clock signal to the processor, a method for controlling the operation of said clock signal, comprising: stopping the clock signal to the processor upon completion of a processor operation; detecting an interrupt generated by an I/O device or a request for memory access subsequent to stopping said clock signal; and, restarting the clock signal to the processor in response to the detection of said interrupt.

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