EP0227965A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Method for ion implant programming NMOS read-only memories and NMOS read-only memory obtained thereby
Assignee: STMicroelectronics SRL
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Filing: 1986-11-29
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Granted: —
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Expires: 2006-11-29
Abstract
Abstract The method for ion implant programing NMOS read-only memories comprises the step of increasing the concentration of boron in the channel only proximate to the source junction of the NMOS devices of the memory which are to be programed 'off'. In this manner it is possible to increase the threshold voltage of these devices without reducing the breakdown voltage thereof, so as to obtain a reliable operation of the device or memory element even for very-large-scale-integration circuits, with a reduced thickness of oxide.
Inventors
- 👤 Paolo Giuseppe Cappelletti
- 👤 Franco Maggioni
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 22:45
CPC Classifications
H; H10; H10B; H10B20/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
67 words
A method for ion implant programing of NMOS read-only memories comprising a plurality of NMOS devices having each drain and source regions and a channel region extending at least partially between said source and drain regions, characterized in that said channel regions are heavier doped at portions thereof adjacent to said source regions of some selected of said NMOS devices to be programed in an OFF state.
Claim 2
Independent Claim
67 words
A method for ion implant programing of NMOS read-only memories comprising a plurality of NMOS devices having each drain and source regions and a channel region extending at least partially between said source and drain regions, characterized in that said channel regions are heavier doped at portions thereof adjacent to said source regions of some selected of said NMOS devices to be programed in an OFF state.
Claim 3
Dependent Claim
31 words
A method according to claim 1, characterized by a boron implant step for said channel region only at said portions thereof adjacent to said source regions for said selected NMOS devices.
Claim 4
Dependent Claim
136 words
In a method for fabricating NMOS read-only memories comprising formation of gate regions on a semiconductor body and formation of drain and source regions in said semiconductor body, the method according to claim 1 or 2, characterized by a program masking step for said semiconductor body after the formation af said gate regions with a programing mask extending on said semiconductor body and having programing openings selectively facing said semiconductor body where said source regions are to be formed; a boron implant step at said programing openings and a selective boron diffusion step in said channel regions, before said formation of said source and drain regions, thereby said channel regions of said selected NMOS devices are heavier doped at said portions thereof adjacent to said source regions than at portions thereof adjacent to said drain regions.
Claim 5
Dependent Claim
32 words
The method according to claim 3, characterized by heavy implant of arsenic in said semiconductor body where said drain and source regions are to be formed after said selective boron diffusion step.
Claim 6
Dependent Claim
57 words
The method according to claim 3, characterized by, after said selective boron diffusion step, a first N type impurities implant where said drain and source regions are to be formed, formation of oxide spacers laterally to said gate regions and second N type impurities implant at said drain and source regions for obtaining light drain doped devices.
Claim 7
Dependent Claim
77 words
NMOS read-only memory, comprising a plurality of NMOS devices having each drain and source regions and a channel region extending at least partially therebetween, with some selected of said NMOS devices having a high concentration of dopant impurities in the channel region for programing said selected NMOS devices in an OFF state, characterized in that said high concentration of dopant impurities is comprised in said channel region only at a portion thereof adjacent to said source region.
Claim 8
Dependent Claim
77 words
NMOS read-only memory, comprising a plurality of NMOS devices having each drain and source regions and a channel region extending at least partially therebetween, with some selected of said NMOS devices having a high concentration of dopant impurities in the channel region for programing said selected NMOS devices in an OFF state, characterized in that said high concentration of dopant impurities is comprised in said channel region only at a portion thereof adjacent to said source region.
References Cited (Backward Citations)
No citation records indexed.
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