Complementary voltage interpolation circuit

Claim 2

An electronic circuit having input means for providing multiple pairs of substantially complementary main signals; characterized by interpolation means comprising two strings of a selected number of impedance elements in which: a node is located between each pair of consecutive impedance elements in each string, at one end of one string, and at a corresponding end of the other string; the pairs of nodes located at like positions along the strings comprise pairs of corresponding input nodes and pairs of corresponding interpolation nodes with at least one of the interpolation nodes located between the two most distant input nodes in either string; each pair of corresponding input nodes receives a different one of the pairs of main signals; and each pair of interpolation nodes provides a pair of inters polated signals.

Claim 3

A circuit as in Claim 1 characterized in that each impedance element in one of the strings has largely the same impedance as the like-positioned impedance element in the other string, the signals of each pair of interpolated signals being substantially complementary to each other.

Claim 4

A circuit as in Claim 2 characterized in that each impedance element is a resistor.

Claim 5

A circuit as in Claim 2 characterized in that the aforementioned end of each string is connected to the other end of one of the strings.

Claim 6

A circuit as in Claim 4 characterized in that each pair of consecutive input nodes is separated by the same number of impedance elements along each string.

Claim 7

A circuit as in Claim 2 characterized in that the number of impedance elements is equal to or greater than twice the number of main signals, at least one of the interpolation nodes lying between each pair of c on - secutive input nodes along each string.

Claim 8

A circuit as in Claim 6 characterized in that each pair of consecutive input nodes is separated by the same number of impedance elements along each string.

Claim 9

A circuit as in Claim 7 characterized in that the number of impedance elements separating each pair of consecutive input nodes along each string is in the range from 2 to 8.

Claim 10

A circuit as in Claim 8 characterized in that each impedance element is a resistor.

Claim 11

A circuit as in Claim 2 wherein the main signals are generated in resonse to an analog input voltage, characterized in that at least one of the pairs of main signals varies in a non-insubstantial manner as a function of the input voltage for each value of the input voltage as it varies across an input voltage range.

Claim 12

A circuit as in Claim 10 characterized in that the main and interpolated signals all vary across substantially the same signal voltage range.

Claim 13

A circuit as in Claim 11 characterized in that the voltage difference between any two main signals at consecutive input nodes along each string at a given value of the input voltage is less than the magnitude V S of the signal voltage range when at least one of the teo signals is changing with the input voltage at the given value.

Claim 14

A circuit as in Claim 12 characterized in that the foregoing voltage difference is optimally V s/ 2 when the two signals are both varying with the input voltage at the given value.

Claim 15

A circuit as in Claim 13 characterized in that each impedance element is a resistor.

Claim 16

A circuit as in Claim 2 characterized by output means for converting the main and interpolated signals into a digital code.

Claim 17

A circuit as in Claim 15 characterized in that the output means comprises a group of comparators, each providing a digital bit in response to a different one of the pairs of corresponding main and interpolated signals.

Claim 18

A circuit as in Claim 15 characterized in that the input means comprises: means for providing a plurality of reference voltages spaced across an input voltage range; means responsive to an input voltage that varies across the input voltage range for generating a plurality of intermediate voltages respectively corresponding to the reference voltages and cumulatively representative of the input voltage, the waveform for each intermediate voltage as a function of the input voltage being of a rounded triangular shape with an extreme value occurring when the input voltage differs slightly from the corresponding reference voltage; and means for combining selected ones of the intermediate voltages to produce the main signals.

Claim 19

An electronic circuit for converting an analog input voltage which varies across an input voltage range into a digital code consisting of a set of most significant bits and a set of least significant bits, there being: means for supplying the most significant bits; means for providing a plurality of reference voltages spaced across the input voltage range; means responsive to the input and reference voltages for generating pairs of substantially complementary main signals, the voltage waveform for each main signal as a function of the input voltage being of a repetitive rounded triangular shape; and means for operating on the main signals to produce the least significant bits; characterized in that: the means for generating comprises: means for producing a like plurality of intermediate voltages respectively corresponding to the reference voltages and cumulatively representative of the input voltage, the waveform for each intermediate voltage as a function c f the input voltage being of a rounded triangular shape with an extreme value occurring when the input voltage is slightly different from the corresponding reference voltage; and means for combining selected ones of the intermediate voltages to produce the main signals; and the means for supplying comprises: further means for combining selected ones of the intermediate voltages to produce pairs of substantially complementary further signals; and a group of coarse comparators, each providing a different one of the most significant bits by comparing the signals of a corresponding pair of the further signals.

Claim 20

An electronic circuit for converting an analog input voltage which varies across an input voltage range into a digital code consisting of a set of most significant bits and a set of least significant bits, there being: means for supplying the most significant bits; means for providing a plurality of reference voltages spaced across the input voltage range; means responsive to the input and reference voltages for generating pairs of substantially complementary main signals, the voltage waveform for each main signal as a function of the input voltage being of a repetitive rounded triangular shape; and means for operating on the main signals to produce the least significant bits; characterized in that: the means for generating comprises: means for producing a like plurality of intermediate voltages respectively corresponding to the reference voltages and cumulatively representative of the input voltage, the waveform for each intermediate voltage as a function c f the input voltage being of a rounded triangular shape with an extreme value occurring when the input voltage is slightly different from the corresponding reference voltage; and means for combining selected ones of the intermediate voltages to produce the main signals; and the means for supplying comprises: further means for combining selected ones of the intermediate voltages to produce pairs of substantially complementary further signals; and a group of coarse comparators, each providing a different one of the most significant bits by comparing the signals of a corresponding pair of the further signals.

Claim 21

A circuit as in Claim 18 characterized in that the means for operating comprises: interpolation means comprising two strings of a selected number of impedance elements in which (1) a node is located between each pair of consecutive impedance elements in each string, at one end of one string, and at a corresponding end of the other string, (2) the pairs of nodes located at like positions along the strings comprise pairs of corresponding input nodes and pairs of corresponding interpolation nodes with at least one of the interpolation nodes located between the two most distant input nodes in either string, (3) each pair of corresponding input nodes receives a different one of the pairs of main signals, and (4) each pair of interpolation nodes provides a pair of substantially complementary interpolated signals; and means for converting the main and interpolated signals into the least significant bits.

Claim 22

A circuit as in Claim 19 characterized in that the means for converting comprises: a group of fine comparators, each providing a digital output signal by comparing the signals of a different pair of the main and interpolated signals: and means for encoding the digital signals to generate the least significant bits.