Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
361 words
A buffer storage control system defining an address of a storage by use of a first portion representing a high-order address and a second portion representing a low-order address comprising: an address register (1) for setting thereto a logical address including the first portion to be translated into a real address and the second portion common to the real address; address translation means (3, 7, 8, 11) connected to said address register for translating the first portion of said address register into a first portion of the real address and for outputting the first portion of the real address; a main storage (13) for retaining data; a buffer storage data section (5) for retaining a copy of a portion of the data stored in said main storage, said buffer storage data section being accessed by use of an address comprising the first portion of said address register including N low-order bits (N being an integer at least equal to 1) and the second portion of said address register including high-order bits; 2 N directory means (40, 41) for retaining the first portion of the real address of the data retained in said buffer storage data section, each said directory means being simultaneously accessed by use of a column address comprising high-order bits of the second portion of said address register, each said directory means including compare means (90, 91, 100, 101) for comparing the first portion of the real address read by the access with the first portion of the real address from said address translate means and for outputting a match/unmatch signal; and indicate means (6, 14) operative based on the match/unmatch signal from said each directory means and the N bits from said address register for effecting a read out or store operation of data on said buffer storage data section, said indicate means including means (120, 121) operative in response to an output of the match signal from one of said directory means different from other said directory means specified, when a read request is issued, by a pattern indicated by the N bits for invalidating an entry accessed in said directory means having outputted the match signal.
Claim 2
Dependent Claim
361 words
A buffer storage control system defining an address of a storage by use of a first portion representing a high-order address and a second portion representing a low-order address comprising: an address register (1) for setting thereto a logical address including the first portion to be translated into a real address and the second portion common to the real address; address translation means (3, 7, 8, 11) connected to said address register for translating the first portion of said address register into a first portion of the real address and for outputting the first portion of the real address; a main storage (13) for retaining data; a buffer storage data section (5) for retaining a copy of a portion of the data stored in said main storage, said buffer storage data section being accessed by use of an address comprising the first portion of said address register including N low-order bits (N being an integer at least equal to 1) and the second portion of said address register including high-order bits; 2 N directory means (40, 41) for retaining the first portion of the real address of the data retained in said buffer storage data section, each said directory means being simultaneously accessed by use of a column address comprising high-order bits of the second portion of said address register, each said directory means including compare means (90, 91, 100, 101) for comparing the first portion of the real address read by the access with the first portion of the real address from said address translate means and for outputting a match/unmatch signal; and indicate means (6, 14) operative based on the match/unmatch signal from said each directory means and the N bits from said address register for effecting a read out or store operation of data on said buffer storage data section, said indicate means including means (120, 121) operative in response to an output of the match signal from one of said directory means different from other said directory means specified, when a read request is issued, by a pattern indicated by the N bits for invalidating an entry accessed in said directory means having outputted the match signal.
Claim 3
Dependent Claim
42 words
A buffer storage control system according to Claim 1 wherein said indicate means further includes means (24) operative in response to an output from said invalidate means for requesting a data transfer from said main storage to said buffer storage data section.
Claim 4
Dependent Claim
54 words
A buffer storage control system according to Claim 2 wherein said indicate means further includes means (117) for setting the pattern of the N bits representing an address to be supplied to said buffer storage data section, when a store request is issued, to correspond to said directory means having outputted the match signal.