Logic circuit

Claim 2

A logic circuit having at least one input terminal and at least one output terminal, which circuit includes a logic stage having at least one input connected to the input terminal and a pair of outputs generating a pair of complementary output signals in response to a signal applied to the input, and an output stage having first and second output transistors connected at their inputs to the outputs of the logic stage, respectively, each of the first and second output transistors having one input, the output of one of the first and second output transistors being connected to the output terminal, comprising first and second auxiliary transistors connected in the cross-coupled flip-flop configuration and having a pair of output nodes connected to the outputs of the first and second output transistors, respectively.

Claim 3

A logic circuit as claimed in Claim 1 wherein the first and second output transistors are, respectively, bipolar transistors connected at their collectors in common to a first voltage supply terminal and at their bases to the outputs of the logic stage, respectively, one of the first and second output bipolar transistors being connected at its emitter to the output terminal, and wherein the first and second auxiliary transistors are also, respectively, bipolar transistors whose collectors are connected to the emitters of the first and second output bipolar transistors, respectively, the base of each of the first and second auxiliary transistors being cross-connected to the collector of the other auxiliary transistor, the emitter of each auxiliary transistor being connected through resistive means to a second voltage supply terminal.

Claim 4

A logic circuit as claimed in Claim 2 wherein the emitters of the first and second auxiliary bipolar transistors are connected to the second voltage supply terminal through a pair of independent resistors, respectively.

Claim 5

A logic circuit as claimed in Claim 2 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the second voltage supply terminal.

Claim 6

A logic circuit as claimed in Claim 2 wherein the base of each of the first and second auxiliary transistors is cross-connected to the collector of the other auxiliary transistor through a capacitor and also connected to the second voltage supply terminal through a resistor.

Claim 7

A logic circuit as claimed in Claim 5 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the second voltage supply terminal.

Claim 8

A logic circuit as claim 1 wherein the logic stage includes a pair of input bipolar transistors connected in the emitter-coupled single differential circuit configuration, one of the input transistors being connected at its base to the input of the logic stage, the other input transistor being connected at its base to a reference voltage, and the collectors of these input transistor being connected to the complementary outputs of the logic stage, respectively.

Claim 9

A logic circuit as claimed in Claim 7 wherein the common-coupled emitters of the input transistors are connected to a voltage supply terminal through a constant current bipolar transistor whose base is connected to a control voltage.

Claim 10

A logic circuit as claimed in Claim 8 wherein the first and second output transistors are, respectively, bipolar transistors connected at their collectors in common to a second voltage supply terminal and at their bases to the outputs of the logic stage, respectively, one of the first and second output bipolar transistors being connected at its emitter to the output terminal, and wherein the first and second auxiliary transistors are also, respectively, bipolar transistors whose collectors are connected to the emitters of the first and second output bipolar transistors, respectively, the base of each of the first and second auxiliary transistors being cross-connected to the collector of the other auxiliary transistor, the emitter of each auxiliary transistor being connected through resistive means to a third voltage supply terminal.

Claim 11

A logic circuit as claimed in Claim 9 wherein the emitters of the first and second auxiliary bipolar transistors are connected to the third voltage supply terminal through a pair of independent resistors, respectively.

Claim 12

A logic circuit as claimed in Claim 9 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the third voltage supply terminal.

Claim 13

A logic circuit as claimed in Claim 9 wherein the base of each of the first and second auxiliary transistors is cross-connected to the collector of the other auxiliary transistor through a capacitor and also connected to the third voltage supply terminal through a resistor.

Claim 14

A logic circuit as claimed in Claim 12 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the third voltage supply terminal.

Claim 15

A current-mode logic circuit which includes a current-mode logic stage having a pair of input bipolar transistors coupled in the emitter-coupled single differential circuit configuration to have their common-connected emitters connected to a first voltage supply terminal through a constant current source, one of the input transistors being connected at its base to receive an input signal and at its collector through a resistor to a second voltage supply terminal, the other input transistor being connected at its base to receive a reference voltage and at its collector through a resistor to the second voltage supply terminal; and an emitter-follower driver having first and second output bipolar transistors connected at their bases to the collectors of the input transistors, respectively, and at their collectors to the second voltage supply terminal, the emitters of the output transistors being connected through load means to a third voltage supply terminal to generate a pair of complementary logic signals, respectively, the emitter of at least one of the output transistors being connected to at least one output terminal, comprising first and second auxiliary transistors connected in the cross-coupled flip-flop configuration and having a pair of output nodes connected to the emitters of the first and second output transistors, respectively.

Claim 16

A current-mode logic circuit which includes a current-mode logic stage having a pair of input bipolar transistors coupled in the emitter-coupled single differential circuit configuration to have their common-connected emitters connected to a first voltage supply terminal through a constant current source, one of the input transistors being connected at its base to receive an input signal and at its collector through a resistor to a second voltage supply terminal, the other input transistor being connected at its base to receive a reference voltage and at its collector through a resistor to the second voltage supply terminal; and an emitter-follower driver having first and second output bipolar transistors connected at their bases to the collectors of the input transistors, respectively, and at their collectors to the second voltage supply terminal, the emitters of the output transistors being connected through load means to a third voltage supply terminal to generate a pair of complementary logic signals, respectively, the emitter of at least one of the output transistors being connected to at least one output terminal, comprising first and second auxiliary transistors connected in the cross-coupled flip-flop configuration and having a pair of output nodes connected to the emitters of the first and second output transistors, respectively.

Claim 17

A logic circuit as claimed in Claim 14 wherein the first and second auxiliary bipolar transistors are connected at their collectors to the emitters of the first and second output bipolar transistors, respectively, the base of each of the first and second auxiliary transistors being cross-connected to the collector of the other auxiliary transistor.

Claim 18

A logic circuit as claimed in Claim 15 wherein the emitters of the first and second auxiliary bipolar transistors are connected to the third voltage supply terminal through a pair of independent resistors, respectively.

Claim 19

A logic circuit as claimed in Claim 15 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the third voltage supply terminal.

Claim 20

A logic circuit as claimed in Claim 15 wherein the base of each of the first and second auxiliary transistors is cross-connected to the collector of the other auxiliary transistor through a capacitor and also connected to the third voltage supply terminal through a resistor.

Claim 21

A logic circuit as claimed in Claim 18 wherein the emitters of the first and second auxiliary bipolar transistors are connected in common to one end of a resistor whose other end is connected to the third voltage supply terminal.