EP0219037A2
Expired / Lapsed
EP
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Waveform processing circuit
Assignee: Sharp Corp
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Filing: 1986-10-07
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Granted: —
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Expires: 2006-10-07
Abstract
Abstract A wave processing circuit includes a switching circuit (3) having first and second inputs (3a, 3b) and one output (3c). The first input is adapted to receive head portions and data portions contained in the reproduced signal from an optical head (50). The second input receives a level signal representing the level of the head portion or the level of the signal carrying the head portion. The switching circuit is operableto move between a first state in which the first input and the output are connected, and a second state in which the second input and the output are connected. A control signal producer (56, 58, 60) is provided for producing a first control pulse (S2) indicating the presence of the data portion. The first control pulse is applied to the switching circuit for actuating the switching circuit to establish the first state when the first control pulse is present, and to establish the second state when the first control pulse is not present, so that the switching circuit continuously produces the signal having a level within the range of the head portion. Thus, no abrupt change caused by the transient phenomena will be observed in the high pass filter connected to the switching circuit.
Inventors
- 👤 Hiroshi Fuji
- 👤 Takashi Iwaki
- 👤 Tsuneo Fujiwara
- 👤 Toshihisa Daiya Haitsu Gakuenmae Deguchi
- 👤 Shozou Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-02 14:43
CPC Classifications
G; G11; G11B; G11B5/00; G11B5/02; G11B5/027; G11B5/035; G11B20/00; G11B20/10; G11B20/10009
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
189 words
A wave processing circuit comprising: switching means (3) having a first input means (3a), a second input means (3b) and an output means (3c), said first input means (3a) being adapted to receive a combination signal which is a combination of a first type signal and a second type signal, said switching means operable to move between a first state in which said first input means and said output means are connected, and a second state in which said second input means and said output means are connected; signal producing means (4, 5) for producing a signal which can be classified as a first type signal and being connected to said second input means (3b); and control signal producing means (56, 58, 60) for producing a first control pulse (S2) indicating the presence of said second type signal, said first control pulse being applied to said switching means for actuating said switching means to establish said first state when said first control pulse is present, and to establish said second state when said first control pulse is not present, whereby said switching means continuously produces said first type signal.
Claim 2
Dependent Claim
189 words
A wave processing circuit comprising: switching means (3) having a first input means (3a), a second input means (3b) and an output means (3c), said first input means (3a) being adapted to receive a combination signal which is a combination of a first type signal and a second type signal, said switching means operable to move between a first state in which said first input means and said output means are connected, and a second state in which said second input means and said output means are connected; signal producing means (4, 5) for producing a signal which can be classified as a first type signal and being connected to said second input means (3b); and control signal producing means (56, 58, 60) for producing a first control pulse (S2) indicating the presence of said second type signal, said first control pulse being applied to said switching means for actuating said switching means to establish said first state when said first control pulse is present, and to establish said second state when said first control pulse is not present, whereby said switching means continuously produces said first type signal.
Claim 3
Dependent Claim
41 words
A wave processing circuit as claimed in Claim 1, where in said first type signal is signal having an amplitude greater than a predetermined level, and said second type signal is a signal having an amplitude less than a predetermined level.
Claim 4
Dependent Claim
85 words
A wave processing circuit as claimed in Claim 1, wherein said control signal producing means (58, 60) further produces a second control pulse (Sl) having a pulse duration greater than that of said first control pulse to cover said second type signal by said second control pulse, and wherein said signal producing means comprises a sample and holding circuit means (4) actuated by said second control pulse for sampling the first type signal and holding the sampled signal while the second type signal is present.
Claim 5
Dependent Claim
87 words
A wave processing circuit as claimed in Claim 1, wherein said first type signal is a low level signal having an amplitude smaller than a predetermined level and containing a high frequency signal carried on a low frequency signal, and wherein said second type signal is a high level signal having an amplitude greater than said predetermined level and containing a high frequency signal carried on a low frequency signal, said combination signal comprising a head portion and a data portion occurring alternately with a predetermined cycle.
Claim 6
Dependent Claim
32 words
A wave processing circuit as claimed in Claim 4, further comprising a high pass filter (Ca, Ra) connected to said output means of said switching means for eliminating said low frequency signal.
Claim 7
Dependent Claim
23 words
A wave processing circuit as claimed in Claim 4, wherein said first control pulse (S2) is prepared with reference to said head portion.
Claim 8
Dependent Claim
29 words
A wave processing circuit as claimed in Claim 4, wherein said control signal producing means comprises a signal detector for detecting binary data contained in said high frequency signal.
Claim 9
Dependent Claim
73 words
A wave processing circuit as claimed in Claim 7, wherein said detector comprising: a reference voltage producing means (R4, R5; 26, 27) for producing a reference signal; and a comparator for comparing said high frequency signal with said reference signal to produce one of a binary signal when said high frequency signal exceeds said reference signal and to produce other of a binary signal when said high frequency signal fall below said reference.signal.
Claim 10
Dependent Claim
32 words
A wave processing circuit as claimed in Claim 8, wherein said reference voltage producing means comprises voltage dividing resistor means (R4, R5) for producing a predetermined constant voltage as said reference signal.
Claim 11
Dependent Claim
55 words
A wave processing circuit as claimed in Claim 8, wherein said reference voltage producing means comprises envelope detector means (26) for detecting an envelope of said high frequency signal, and a center line detecting means (27) for detecting a center line of said envelope and producing a center line level signal as said reference signal.
Claim 12
Dependent Claim
221 words
A wave processing circuit comprising: ; a differential amplifier (7) having a first input terminal, second input terminal and output terminal, said first input terminal being adapted to receive a combination signal which is a combination of a first type signal and a second type signal signal producing means (4, 5, 6) for producing a signal which can be classified as a first type signal and being connected to said second input terminal of said differential amplifier; switching means (3) having a first input means (3a) connected to said output terminal of said differential amplifier, a second input means (3b) connected to a ground, and an output means (3c), said switching means operable to move between a first state in which said first input means and said output means are connected, and a second state in which said second input means and said output means are connected; and control signal producing means (56, 58, 60) for producing a first control pulse (S2) indicating the presence of said second type signal, said first control pulse being applied to said switching means for actuating said switching means to establish said first state when said first control pulse is present, and to establish said second state when said first control pulse is not present, whereby said switching means continuously produces said first type signal.
Claim 13
Dependent Claim
221 words
A wave processing circuit comprising: ; a differential amplifier (7) having a first input terminal, second input terminal and output terminal, said first input terminal being adapted to receive a combination signal which is a combination of a first type signal and a second type signal signal producing means (4, 5, 6) for producing a signal which can be classified as a first type signal and being connected to said second input terminal of said differential amplifier; switching means (3) having a first input means (3a) connected to said output terminal of said differential amplifier, a second input means (3b) connected to a ground, and an output means (3c), said switching means operable to move between a first state in which said first input means and said output means are connected, and a second state in which said second input means and said output means are connected; and control signal producing means (56, 58, 60) for producing a first control pulse (S2) indicating the presence of said second type signal, said first control pulse being applied to said switching means for actuating said switching means to establish said first state when said first control pulse is present, and to establish said second state when said first control pulse is not present, whereby said switching means continuously produces said first type signal.
Claim 14
Dependent Claim
41 words
A wave processing circuit as claimed in Claim 11, where in said first type signal is signal having an amplitude greater than a predetermined level, and said second type signal is a signal having an amplitude less than a predetermined level.
Claim 15
Dependent Claim
85 words
A wave processing circuit as claimed in Claim 11, wherein said control signal producing means (58, 60) further produces a second control pulse (Sl) having a pulse duration greater than that of said first control pulse to cover said second type signal by said second control pulse, and wherein said signal producing means comprises a sample and holding circuit means (4) actuated by said second control pulse for sampling the first type signal and holding the sampled signal while the second type signal is present.
Claim 16
Dependent Claim
87 words
A wave processing circuit as claimed in Claim 11, wherein said first type signal is a low level signal having an amplitude smaller than a predetermined level and containing a high frequency signal carried on a low frequency signal, and wherein said second type signal is a high level signal having an amplitude greater than said predetermined level and containing a high frequency signal carried on a low frequency signal, said combination signal comprising a head portion and a data portion occurring alternately with a predetermined cycle.
Claim 17
Dependent Claim
32 words
A wave processing circuit as claimed in Claim 14, further comprising a high pass filter (Ca, Ra) connected to said output means of said switching means for eliminating said low frequency signal.
Claim 18
Dependent Claim
23 words
A wave processing circuit as claimed in Claim 14, wherein said first control pulse (S2) is prepared with reference to said head portion.
Claim 19
Dependent Claim
29 words
A wave processing circuit as claimed in Claim 14, wherein said control signal producing means comprises a signal detector for detecting binary data contained in said high frequency signal.
Claim 20
Dependent Claim
74 words
A wave processing circuit as claimed in Claim 17, wherein said detector comprising: a reference voltage producing means (R4, R5; 26, 27) for producing a reference signal; and a comparator for comparing said high frequency signal with said reference signal to produce one of a binary signal when said high frequency signal exceeds said reference signal and to produce other of a binary signal when said high frequency signal fall below said reference signal.
Claim 21
Dependent Claim
32 words
A wave processing circuit as claimed in Claim 18, wherein said reference voltage producing means comprises voltage dividing resistor means (R4, R5) for producing a predetermined constant voltage as said reference signal.
Claim 22
Dependent Claim
55 words
A wave processing circuit as claimed in Claim 18, wherein said reference voltage producing means comprises envelope detector means (26) for detecting an envelope of said high frequency signal, and a center line detecting means (27) for detecting a center line of said envelope and producing a center line level signal as said reference signal.
References Cited (Backward Citations)
No citation records indexed.
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