EP0217448A1
Expired / Lapsed
EP
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Raster image processor
Assignee: Canon Production Printing Netherlands BV
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Filing: 1986-09-15
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Granted: —
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Expires: 2006-09-15
Abstract
Abstract Raster image processor (15) (RIP) for filling a page-size raster image memory (16) with the bit representation of graphical characters and type characters, the bit representation of each character being stored in the form of n-bit words in consecutive addresses in a memory (12,13) and being capable of being supplied via an asynchronous bus system (14) to the raster image processor (15), and for the conversion of the data stored in the raster image memory (16) into a serial pixel-bit stream for a raster output scanner in order to obtain a printed page. The raster image processor (15) and the raster image memory (16) are connected to each other via a synchronous raster image bus system (17), and the raster image processor (15) comprises:- a microprogrammable central processing unit (43) (CPU),- a raster image bus interface (45) which is connected to the synchronous raster image bus system (17),- a raster output scanner interface (42,44) which is connected to a raster output scanner,- an interface (41) which is connected to the asynchronous bus system (14), and- a synchronous raster image processor bus system (46) which connects the microprogrammable CPU (43) to the raster image bus interface (45), to the raster output scanner interface (42,44) and to the interface (41) which is connected to the asynchronous bus system (14).
Inventors
- 👤 Theodorus Hubertus Willems
- 👤 Franciscus Hubertus Tunnissen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 15:11
CPC Classifications
G; G06; G06K; G06K15/00; G06K15/02; G06K2215/00; G06K2215/0002; G06K2215/004; G06K2215/0042; G06K2215/0062
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
226 words
Raster image processor (15) (RIP) for filling a page-size raster image memory (16) with the bit representation of graphical characters and type characters, the bit representation of each character being stored in the form of n-bit words in consecutive addresses in a memory (12,13) and being capable of being supplied via an asynchronous bus system (14) to the raster image processor (15), and for the conversion of the data stored in the raster image memory (16) into a serial pixel-bit stream for a raster output scanner in order to obtain a printed page, characterised in that the raster image processor (15) and the raster image memory (16) are connected to each other via a synchronous raster image bus system (17), and that the raster image processor (15) comprises: - a microprogrammable central processing unit (43) (CPU), - a raster image bus interface (45) which is connected to the synchronous raster image bus system (17), - a raster output scanner interface (42,44) which is connected to a rster output scanner, - an interface (41) which is connected to the asynchronous bus system (14), and - a synchronous raster image processor bus system (46) which connects the microprogrammable CPU (43) to the raster image bus interface (45), to the raster output scanner interface (42,44) and to the interface (41) which is connected to the asynchronous bus system (14).
Claim 2
Dependent Claim
226 words
Raster image processor (15) (RIP) for filling a page-size raster image memory (16) with the bit representation of graphical characters and type characters, the bit representation of each character being stored in the form of n-bit words in consecutive addresses in a memory (12,13) and being capable of being supplied via an asynchronous bus system (14) to the raster image processor (15), and for the conversion of the data stored in the raster image memory (16) into a serial pixel-bit stream for a raster output scanner in order to obtain a printed page, characterised in that the raster image processor (15) and the raster image memory (16) are connected to each other via a synchronous raster image bus system (17), and that the raster image processor (15) comprises: - a microprogrammable central processing unit (43) (CPU), - a raster image bus interface (45) which is connected to the synchronous raster image bus system (17), - a raster output scanner interface (42,44) which is connected to a rster output scanner, - an interface (41) which is connected to the asynchronous bus system (14), and - a synchronous raster image processor bus system (46) which connects the microprogrammable CPU (43) to the raster image bus interface (45), to the raster output scanner interface (42,44) and to the interface (41) which is connected to the asynchronous bus system (14).
Claim 3
Dependent Claim
36 words
Raster image processor according to claim 1, characterised in that the interface (41) which is connected to the asynchronous bus system (14) comprises a master interface (100), a slave interface (101) and an interrupter interface (102).
Claim 4
Dependent Claim
114 words
Raster image processor according to claim 2, characterised in that the master interface (100) comprises - an address counter (132,133) which can be loaded by the microprogrammable CPU (43) with the start address or end address of a character in the memory (12,13), - a buffer (135) which can receive n-bit words associated with said address from the memory (12,13) and transmit them to the raster image processor bus (46), and - a settable up/down counter which increases or decreases the address counter by 1 after each transmission of an n-bit word, the counter being set with the data relating to the number of n-bit words which comprises the character in the memory (12,13).
Claim 5
Dependent Claim
75 words
Raster image processor according to claim 3, characterised in that between the buffer (135) and the raster image processor bus (46) there is disposed a mirror circuit (136) which mirrors the separate bits in the n-bit words as follows: bit 0 by bit n, bit 1 by bit n-1, bit 2 by bit n-2, etc. and in which a control circuit (130) causes the content of the address counter (132,133) always to decrease by 1.
Claim 6
Dependent Claim
95 words
Raster image processor according to any of the preceding claims, characterised in that the raster output scanner interface (42,44) comprises: - an n-bit parallel-in serial-out shift register (112), the output of which is connected to the video input of the raster output scanner and the inputs of which are connected to the outputs of a register (111), and - a control circuit (110), connected to the two registers (111 and 112) and to the raster output scanner (ROS), which delivers burst pulses to the control circuit (110), the control circuit (110) comprising an n-bit counter.
Claim 7
Dependent Claim
147 words
Method for supplying a serial pixel-bit stream to a raster output scanner in a raster image processor according to claim 5, characterised by the following steps: - the loading of an n-bit word from the raster image memory (16) into the shift register (112) and the loading of the register (111) with a new word, - the shifting out with each burst pulse of one video pixel from the shift register (112) and the supplying thereof to the video input of the raster output scanner, while the content of the counter of the n-bit counter is increased by 1, and - the shifting through of the new word during the nth counting pulse from the register (111) to the shift register (112) and the simultaneous resetting of the n-bit counter and the loading of a subsequent word from the raster image memory (16) into the register (111).
References Cited (Backward Citations)
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