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EP0217065A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

Integrated circuit of the complementary technique having a substrate bias generator

Assignee: Siemens AG
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Filing: 1986-08-04
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Granted: —
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Expires: 2006-08-04
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Abstract

Abstract This substrate bias generator (16) applies a negative (positive) substrate bias voltage to the p(n) substrate (1) into which n(p) troughs (2) are inserted. The source regions (3) of the n(p) channel FETs arranged in the substrate are connected to earth potential. To avoid "latch-up" effects, the output (17) of the substrate bias generator (16) is connected via an electronic switch (S1) to a circuit point (8) connected to earth potential, the switch being driven via the said output (17). <IMAGE>

Inventors

  • 👤 Dezsö Dipl.-Phys. Takàcs
  • 👤 Josef Dr.-Ing. Winnerl

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 16:36
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/205; H; H03; H03K; H03K2217/00; H03K2217/0018

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

US4109161A Cited
EP0036494A2 Cited
WO1984003185A1 Cited

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