EP0216581A2
Expired / Lapsed
EP
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Via profiling in integrated circuits
Assignee: STC PLC
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Filing: 1986-09-12
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Granted: —
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Expires: 2006-09-12
Abstract
Abstract Vias are formed in multilayer integrated circuits by etching of an uncured or partially cured dielectric film priorto etching to define the via. Heating of the partially cured dielectric produces flow prior to final curing. This provides a smooth edge to the via thus reducing the risk of discontinuity in an upper metallisation layer.
Inventors
- 👤 Roger Leslie Baker
- 👤 Stephen Robert Jennings
- 👤 Sacharia Albin
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 20:07
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/286; H10P50/287; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; H05; H05K; H05K3/00; H05K3/0011; H05K3/0017; H05K3/46; H05K3/4644
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
68 words
A method of fabricating a via in an integrated circuit, the method including depositing a curable dielectric film over a conductor track, heating the dielectric to effect a partial cure, anisotropically etching the partially cured dielectric to define the via and expose the track, and further heating the dielectric thereby flowing the dielectric to form a smoothly profiled cross-section adjacent the via and effecting curing of the dielectric.
Claim 2
Independent Claim
68 words
A method of fabricating a via in an integrated circuit, the method including depositing a curable dielectric film over a conductor track, heating the dielectric to effect a partial cure, anisotropically etching the partially cured dielectric to define the via and expose the track, and further heating the dielectric thereby flowing the dielectric to form a smoothly profiled cross-section adjacent the via and effecting curing of the dielectric.
Claim 3
Independent Claim
82 words
A method of fabricating a via in an integrated circuit, the method including depositing a dielectric film curable via a condensation polymerisation over a conductor track, partially curing the dielectric by heating the dielectric to a temperature sufficient to effect.polymerisation but insufficient to remove the reaction byproducts, anisotropically etching the partially cured dielectric to define the via and expose the track, and annealing the dielectric thereby flowing the dielectric to form a smoothly profiled cross-section adjacent the via and completing the cure.
Claim 4
Independent Claim
82 words
A method of fabricating a via in an integrated circuit, the method including depositing a dielectric film curable via a condensation polymerisation over a conductor track, partially curing the dielectric by heating the dielectric to a temperature sufficient to effect.polymerisation but insufficient to remove the reaction byproducts, anisotropically etching the partially cured dielectric to define the via and expose the track, and annealing the dielectric thereby flowing the dielectric to form a smoothly profiled cross-section adjacent the via and completing the cure.
Claim 5
Dependent Claim
15 words
A method as claimed in claim 2, characterised in that the dielectric is a polyimide.
Claim 6
Dependent Claim
32 words
A method as claimed in claim 3, characterised in that the dielectric is partially cured by heating to a temperature of 115 to 200°C for a period of 10 to 60 minutes.
Claim 7
Independent Claim
23 words
A method as claimed in any one of claims 1 to 4, characterised in that the dielectric is etched with an oxygen plasma.
Claim 8
Independent Claim
30 words
A method as claimed in any.one of claims 1 to 6, characterised in that the dielectric is annealed by heating at a steadily increasing rate to a maximum annealing temperature.
Claim 9
Dependent Claim
19 words
An integrated circuit incorporating vias formed by a method as claimed in any one of claims 1 to 6.
References Cited (Backward Citations)
No citation records indexed.
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