Defective element disabling circuit having a laser-blown fuse

Claim 1

A random access memory comprising a memory matrix and control means therefor, said memory matrix having a plurality of rows, each row having a row address within a row address range and a row activation means connected thereto for applying a control signal to said row in response to a predetermined row address within said row address range; at least two redundant row lines, each having a redundant row activation means connected thereto, for applying an activation signal to one of said at least two redundant row lines, each of said redundant row activation means comprising a programmable address-recognition means for responding to a programmed defective row address within said row address range that identifies a defective row in said memory matrix; and means for inactivating at least that one of said plurality of rows having said defective row address, whereby an activated redundant row having an address-recognition means programmed to respond to a predetermined defective row address substitutes for a defective row having the same defective row address, characterized in that: said means for inactivating at least one of said plurality of rows comprises a plurality of programmable inactivation means, each connected to a row activation means for long-term inactivation thereof, each programmable inactivation means being electrically independent of that one of said programmable address-recognition means for responding to a programmed defective row address that is responsive to the row address of said one of said plurality of rows; and which programmable inactivation means comprises: means for blocking the passage of a signal from a decoder unit responsive to an input row address to a control line activating unit ordinarily connected to said decoder unit; and means for forcing said control line activating unit to a default state that renders said control line inactive; which control line unit includes a low-impedance output directly connected to said control line and being in one of two low-impedance states.