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EP0209794A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method for producing a contact for a semiconductor device

Assignee: Fujitsu Ltd
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Filing: 1986-07-09
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Granted: —
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Expires: 2006-07-09
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Abstract

Abstract A method of producing a semiconductor device comprises the steps of forming a field insulating layer (12) and at least two gate insulating layers (13a, 13b) on a semiconductor substrate (11), where the gate insulating layers (13a, 13b) are formed at at least two locations on the semiconductor substrate (11), forming a first conductive layer (21) so as to cover the field insulating layer (12) and the gate insulating layers (13a, 13b), patterning the first conductive layer and one of the gate insulating layers (13a) so as to form a contact hole (22) in which a surface of the semiconductor substrate (11) is exposed, forming a second conductive layer (23) so as to cover the contact hole (22) and the first conductive layer (13a), and patterning the first and second conductive layers (21, 23) so as to form a gate electrode and wiring extending on another (13b) of the gate insulating layers. This other gate insulating layer (13b) is protected by the first conductor layer (21) which covers this other gate insulating layer when the contact hole (22) is formed.

Inventors

  • 👤 Taiji c/o Fujitsu Limited Patent Department Ema

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 14:36
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10B; H10B10/00; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/031; H10W20/0698

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 128 words
A method of producing a semiconductor device comprising the steps of: forming a field insulating layer and gate insulating layers on a semiconductor substrate, said gate insulating layers being formed at at least two locations on said semiconductor substrate; forming a first conductive layer so as to cover said field insulating layer and said gate insulating layers; patterning said first conductive layer and one of said gate insulating layers so as to form a contact hole in which a surface of said semiconductor substrate is exposed; forming a second conductive layer so as to cover said contact hole and said first conductive layer; and patterning said first and second conductive layers so as to form a gate electrode and wiring extending on another of said gate insulating layers.
Claim 2
Independent Claim 128 words
A method of producing a semiconductor device comprising the steps of: forming a field insulating layer and gate insulating layers on a semiconductor substrate, said gate insulating layers being formed at at least two locations on said semiconductor substrate; forming a first conductive layer so as to cover said field insulating layer and said gate insulating layers; patterning said first conductive layer and one of said gate insulating layers so as to form a contact hole in which a surface of said semiconductor substrate is exposed; forming a second conductive layer so as to cover said contact hole and said first conductive layer; and patterning said first and second conductive layers so as to form a gate electrode and wiring extending on another of said gate insulating layers.
Claim 3
Dependent Claim 23 words
A method of producing a semiconductor device as claimed in claim 1 in which said first and second conductive layers are polysilicon layers.
Claim 4
Dependent Claim 31 words
A method of producing a semiconductor device as claimed in claim 1 in which said first conductive layer is a polysilicon layer and said second conductive layer is a silicide layer.
Claim 5
Dependent Claim 47 words
A method of producing a semiconductor device as claimed in claim 1, 2 or 3 in which said first conductive layer has a thickness within a range of approximately 500 to 0 1000 A and said second conductive layer has a thickness of 0 approximately 3000 A.
Claim 6
Independent Claim 106 words
A method of producing a semiconductor device as claimed in any preceding claim in which the step of patterning to form said contact hole comprises the substeps of: patterning to remove said first conductive layer and said one gate insulating layer by use of a resist so as to form said contact hole at a predetermined position; and removing a natural oxide layer formed on the surface of said semiconductor substrate exposed within said contact hole by etching, said other gate insulating layer being protected by said first conductor layer covering said other gate insulating layer when said natural oxide layer is removed by the etching.

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