EP0208429A2
Expired / Lapsed
EP
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Method and apparatus for addressing a number of address spaces
Assignee: HP Inc
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Filing: 1986-06-12
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Granted: —
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Expires: 2006-06-12
Abstract
Abstract A computer system has the ability to access a large number of address spaces using a long pointer or to access a limited number of address spaces using a short pointer comprising a space specifier in a memory reference instruction. The two bit space specifier identifies a space register containing the space identifier of the desired address space. if the spece specifier is zero, the upper two bits of a base address specify a space register and the entire base address specifies a specific memory location therein.
Inventors
- 👤 William S. Worley
- 👤 Steven S. Muchnick
- 👤 Terrence C. Miller
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 03:46
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/0223; G06F12/0292; G06F12/08; G06F12/10
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
86 words
A method for accessing a desired memory location in a desired address space, comprising the steps of: reading a memory reference instruction; examining a space specifier in the memory reference instruction; reading a base address if the space specifier has a short value; reading an identifier portion of the base address; accessing a space register identified by the identifier portion of the base address; accessing the desired address space from the contents of the space register; and accessing the desired memory location from the base address.
Claim 2
Independent Claim
86 words
A method for accessing a desired memory location in a desired address space, comprising the steps of: reading a memory reference instruction; examining a space specifier in the memory reference instruction; reading a base address if the space specifier has a short value; reading an identifier portion of the base address; accessing a space register identified by the identifier portion of the base address; accessing the desired address space from the contents of the space register; and accessing the desired memory location from the base address.
Claim 3
Dependent Claim
26 words
A method as in claim 1, wherein the base address is contained in a base register identified by a base field of the memory reference instruction.
Claim 4
Dependent Claim
23 words
A method as in claim 2, wherein the identifier portion of the base address includes the most significant bit of the base address.
Claim 5
Dependent Claim
24 words
A method as in claim 3, wherein the identifier portion of the base address comprises the two most significant bits of the base address.
Claim 6
Dependent Claim
20 words
A method as in claim 4, wherein the space specifier is a two bit field within the memory reference instruction.
Claim 7
Dependent Claim
14 words
6 . A method as in claim 5, wherein the short value is 00.
Claim 8
Dependent Claim
19 words
A method as in claim 6, wherein the memory reference instruction is either a LOAD or a STORE instruction.
Claim 9
Dependent Claim
19 words
A computer when programmed to operate according to the method as claimed in any of claims 1 to 7.
References Cited (Backward Citations)
No citation records indexed.
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