Auxiliary reactor protection system and method

Claim 2

Protection apparatus in a control system receiving control status signals from control system sensors and contacts, and actuating control system protection devices, said protection system comprising: input conditioning means, receiving said status signals, for conditioning said control status signals, characterized by: at least three trip logic processing means, each receiving the conditioned status signals, each producing a partial trip signal in dependence upon the conditioned status signals and a predetermined partial trip logic scheme; further characterized by: voting means responsive to the partial trip signals for producing an actuation signal in dependence upon the partial trip signals in accordance with a predetermined voting scheme; and power interface means responsive to the actuation signal for actuating the control system protection devices in dependence upon the actuation signal.

Claim 3

A system as recited in claim 1, wherein said predetermined trip signal voting scheme includes means for actuating the control system protection devices if at least two partial trip signals are produced by said at least three trip logic processing means.

Claim 4

A system as recited in claim 1, wherein said voting means comprises at least' two voters connected between said trip logic processing means and said power interface means, wherein further the system includes means to produce trip logic test signals.

Claim 5

A system as recited in claim 3, wherein said trip logic test signals include a ramped analog signal and maximum and minimum value signals, said test processing means produces sample values and set point values from said ramped analog signal, set point values from said maximum and minimum value signals and produces the partial trip signal from the set point values, and said test processing means compares the set point values with the ramped analog signal and produces an input failure indication when an error occurs, and compares the minimum and maximum value signals to the trip signal and produces the partial trip logic processing failure indication when in error.

Claim 6

A system as recited in claim 4, wherein said test processing means comprises: a test system processor connected to said trip logic processing means; a digital-to-analog converter connected to said test system processor and said input conditioning means; and a digital input/output unit connected to said test system processor, said input conditioning means and said voting and actuation means.

Claim 7

A system as recited in claim 5, wherein each of said trip logic processing means comprises a trip logic processor, and wherein said system further comprises: a single bus interconnecting said trip logic processors, said test system processor, said digital-to-analog converter and said digital input/output unit.

Claim 8

A system as recited in claim 5, wherein each of said trip logic processing means comprises a trip logic processor, and wherein said system further comprises: at least three trip logic buses connected to respective trip logic processors; a test system bus connected to said test system processor, said digital-to-analog converter and said digital input/output unit; and parallel to serial communication devices connected between said trip logic buses and said test system bus.

Claim 9

A system as recited in claim 3, wherein said test processing means produces switching signals, a ramp test signal, a ramp test enable signal, reference test enable signals and digital test signals and digital test enable signals; and wherein said system further comprises: reference voltage means for providing reference voltages; and selection means, operatively connected to receive said status signals and to said test processing means and one of said trip logic processing means, for providing one of the status signals, the ramp test signals, the reference voltages and the digital test signals to the one of said trip logic processing means in dependence upon the switching, the ramp test enable, the reference test enable and digital test enable signals.

Claim 10

A system as recited in claim 4, wherein the predetermined partial trip signal voting scheme is a two-out-of-three voting scheme.

Claim 11

A system as recited in claim 4, wherein said voting and actuation means comprises: at least two voters connected to said test processing means and said trip logic processing means; and actuators connected to said voters.

Claim 12

A system as recited in claim 4, wherein said actuators comprise: a relay having a coil connected to one of said voters and for actuating the control system protection devices; and means for applying a test voltage to the coil when the voter test signals are produced.

Claim 13

A system as recited in claim 1, wherein said input conditioning means includes a plurality of conditioning units wherein each of said conditioning units comprises: an analog input board including: reference and ground voltage sources; a first relay, connected to said test processor and said reference and ground voltage . sources, for switching between the reference and ground sources in dependence upon the test enable signals; a second relay, connected to said first relay and said test processor, for switching between the first relay and the analog input test signals in dependence upon the test enable signals; and a third relay, connected to one of the sensors, said second relay, said test processor and one of said trip logic processors, for switching between the second relay and the one of the sensors in dependence upon the test enable signals; and a digital input board including: a current loop, a first pair of relays, connected to said test processors and said current loop, for switching to and from said current loop in dependence upon the test enable signal; and a second pair of relays connected to said first pair of relays, said test processor and one of the contacts, for switching between the first pair of relays and the one of the contacts.

Claim 14

A system as recited in claim 12, including at least two voter testing units, each connected to said test processor and said trip logic processors, each putting out one of the voter test signals and partial trip signals wherein each of said voter testing units comprises: first switches, connected to said test processor and the respective said voter unit, for switching the voter test signals produced by said test processor to the respective said voter unit; second switches, connected to the respective said voter unit and said test processor, for providing one of an actuation voltage sufficient to actuate said relays and the test actuation signal to said relays; and an optocoupler, connected between said second switches and said test processor, for providing the test actuation signal to said test processor.

Claim 15

A system as recited in claim 12, further comprising a single bus over which said test processor and said trip logic processors communicate.

Claim 16

A system as recited in claim 12, further comprising: at least three trip logic buses connected to and associated with respective trip logic processors; a test system bus connected to said test processor; and parallel-to-serial communication devices connected between said trip logic buses and said test system bus.

Claim 17

A system as recited in claim 14, further comprising at least three analog-to-digital converters connected between respective conditioning units and trip logic buses.

Claim 20

A method as recited in claim 17, wherein said predetermined voting scheme produces the actuation signal when at least two partial trip signals are produced.