EP0201972A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
A pixel rounding method and circuit for use in a raster scan display device and a raster scan display device comprising such circuit
Assignee: Philips Electronics UK Ltd
•
Filing: 1986-05-05
•
Granted: —
•
Expires: 2006-05-05
Abstract
Abstract A pixel rounding method and circuit for bit-map graphics displays. The pixel codes are divided into two groups "high" and "low", and pixels with "high" groups codes are rounded against pixels with "low" group codes. The rounding can be prerounding or bostrounding and involves extending a rounded pixel bartway into the adjacent (preceding or succeeding) oixel position. Rounding decisions are made by detecting diagonal relationships of "high" and "low" group codes in blocks in four pixel codes. A round- ng circuit receives a pixel code stream and produces a version thereof which is delayed by one pixel period. In accordance with the rounding decisions, the original and delayed pixel code streams are selectively switched each half pixel period to brovide a resultant pixel code stream which is used to generate the display. Figure 4 shows a block diagram of the rounding circuit.
Inventors
- 👤 David George Clark
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 20:19
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/391
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
378 words
A pixel rounding method for diplaying on a screen of a raster scan display device, a plurality of information pixels, each of which is represented by a respective digital code stored in a display memory, said digital codes being accessed repeatedly to display the information pixels in a recurrent cycle of scanning line, with each row of information pixels being displayed twice in adjacent scanning lines and wherein each digital code either belongs to a dominant group of codes or to a non-dominant group of codes, said method comprising the steps of: (a) obtaining from the display memory, in such manner as to make available in each scanning line period, the digital codes of the current row of information pixels for the current scanning line as undelayed fundamental pixel information and producing a second version thereof which is delayed by one pixel period as delayed fundamental pixel information, (b) obtaining from the display memory, the digital codes of the preceding tow of information pixels when it is the first occurrence of the current row of information pixels, as reference information, but the digital codes of the succeeding row of information pixels when it is the second occurrence of the current row of information pixels, as reference information, (c) detecting allocations to said two groups of two successive undelayed fundamental information pixels and two successive reference information pixels coicidently available, for the ex- istance of allocation of two diagonally opposed information pixels to said dominant group and a further fundamental information pixel to said non-dominant group, such allocation representing a predetermined diagonal relationship; (d) upon absence of such detecting, selecting for producing the pixel display in the second half of each pixel period the undelayed fundamental pixel information and in the first half of the next pixel period the delayed fundamental pixel information, (e) but upon detecting a first predetermined diagonal relationship prerounding a pixel allocated to said dominant group by selecting for said first half of a pixel period the undelayed fundamental information and upon detecting a further predetermined diagonal relationship postrounding a pixel allocated to said dominant group by selecting for the second half of a pixel period the delayed fundamental information, such prerounding and postrounding thereby suppressing a half pixel originally allocated to said non-dominant group.
Claim 2
Dependent Claim
378 words
A pixel rounding method for diplaying on a screen of a raster scan display device, a plurality of information pixels, each of which is represented by a respective digital code stored in a display memory, said digital codes being accessed repeatedly to display the information pixels in a recurrent cycle of scanning line, with each row of information pixels being displayed twice in adjacent scanning lines and wherein each digital code either belongs to a dominant group of codes or to a non-dominant group of codes, said method comprising the steps of: (a) obtaining from the display memory, in such manner as to make available in each scanning line period, the digital codes of the current row of information pixels for the current scanning line as undelayed fundamental pixel information and producing a second version thereof which is delayed by one pixel period as delayed fundamental pixel information, (b) obtaining from the display memory, the digital codes of the preceding tow of information pixels when it is the first occurrence of the current row of information pixels, as reference information, but the digital codes of the succeeding row of information pixels when it is the second occurrence of the current row of information pixels, as reference information, (c) detecting allocations to said two groups of two successive undelayed fundamental information pixels and two successive reference information pixels coicidently available, for the ex- istance of allocation of two diagonally opposed information pixels to said dominant group and a further fundamental information pixel to said non-dominant group, such allocation representing a predetermined diagonal relationship; (d) upon absence of such detecting, selecting for producing the pixel display in the second half of each pixel period the undelayed fundamental pixel information and in the first half of the next pixel period the delayed fundamental pixel information, (e) but upon detecting a first predetermined diagonal relationship prerounding a pixel allocated to said dominant group by selecting for said first half of a pixel period the undelayed fundamental information and upon detecting a further predetermined diagonal relationship postrounding a pixel allocated to said dominant group by selecting for the second half of a pixel period the delayed fundamental information, such prerounding and postrounding thereby suppressing a half pixel originally allocated to said non-dominant group.
Claim 3
Dependent Claim
56 words
A pixel rounding method as claimed in claim 1, characterised in that in respect of ste (b), the digital codes for the preceding row of information pixels are obtained by delaying the digital codes for each row of information pixels by one line scan period following read out of these diütal codes from the display memory.
Claim 4
Dependent Claim
66 words
A pixel rounding method as claimed in Claim 1 or Claim 2, characterised in that in respect of step (b), the digital codes for the succeeding row of information pixels are obtained by reading out the digital codes from the display, delaying these codes by one line scan period to serve as the fundamental pixel information and using these codes directly as the reference pixel information.
Claim 5
Dependent Claim
61 words
A pixel rounding method as calimed in any of Claims 1 to 3, characterised in that for step (c) successive four element groups of pixel codes, two codes in each of the fundamental and the reference pixel information, are examined to detect the presence of two diagonally opposed codes of one group and two diagonally opposed codes of the opposite group.
Claim 6
Dependent Claim
59 words
A pixel rounding method as calimed in any one of Claims 1 to 3, characterised in that for step (c) successive four element groups of pixel codes, two codes in each of the fundamental and the reference pixel information, are examined to detect the presence of one code of the non-dominant group and three codes of the dominant group.
Claim 7
Dependent Claim
49 words
A pixel rounding method as claimed in Claim 4 or Claim 5, characterised by the further step of dividing one group of codes into two sub-groups and selectively performing one or the other detection examinations in accordance with the subgroup to which the codes of said one group belong.
Claim 8
Dependent Claim
32 words
A pixel rounding method as claimed in any of Claims 1 through 6, wherein said digital codes contain a single bit and said dominant and non-dominant groups each contain a single code.
Claim 9
Dependent Claim
36 words
A pixel rounding method as claimed in any of Claims 1 through 6, wherein said digital codes contain at least two bits and said dominant and non-dominant groups each contain at least two, mutually exclusive, codes.
Claim 10
Dependent Claim
26 words
A pixel rounding method as claimed in Claim 8, wherein the distinction between a dominant code and a non-dominant code is dependent on a single bit.
Claim 11
Dependent Claim
309 words
A pixel rounding circuit for performing the rounding method claimed in any one of Claims 1 -9 comprising: a. input means fed by said display memory for receiving a sequence of fundamental information pixels and reference information pixels, as being presented in synchronism with a pixel clock rate; b. latch means fed by said input means for therefrom receiving said fundamental information pixels and which is operable at said pixel clock rate to produce the delayed version of said fundamental pixel informations; c. a first multiplexer fed by said input means to receive said fundamental pixel informations and by said latch means to receive said delayed fundamental pixel information; d. group decoding means fed by said input means for receiving the fundamental and reference pixel informations and for upon each pixel information received producing a binary signal as indicating an allocation to either said dominant group or said non-dominant group; e. storage means fed by said decoding means for storing said allocation indications; f. detection means fed by said group decoding means and said storage means for reciving allocation indications pertaining to at least two fundamental pixel informations plus associated reference pixel information, for therefrom detecting occurrence of said predetermined diagonal relationships and for signalling these on a prerounding output and a postrounding output, respectively; g. a second multiplexer fed by said prerounding output and said postrounding output, and an output which in connected to a switching input of the first multiplxer, said second multiplexer being switched at pixel clock rate to connect its output to said prerounding output for the first half of each pixel period and to connect its output to said postrounding output for the second half of each pixel period, a resultant switching signal at the second multiplexer output switching the first multiplexer so as to connect an output thereof to either of its inputs.
Claim 12
Dependent Claim
353 words
A pixel rounding circuit for performing the rounding method claimed in any of Claims 1 through 9, comprising: (i) a first multiplexer having a first input to which the fundamental pixel information is applied, (ii) a latch to which the fundamental pixel information is also applied and which is operable at pixel clock rate to produce the delayed version of the fundamental pixel information, a second input of the first multiplexer having this delayed version of the fundamental pixel information applied to it, (iii) two group decoders to which the fundamental and the reference pixel information are applied, respectively, and which are operable to produce a logic 0 or a logic 1 output according as the digital codes forming the pixel information applied to them belong to either one of two groups as determined by decoders, (iv) two flip-flops having inputs connected respectively to outputs of the two group decoders, which flip-flops are driven at pixel clock rate so as to produce at respective outputs the logic 0 or 1 value applied to their inputs from the relevant decoder in the preceding pixel period, (v) two AND-gates each having four inputs connected respectively to the two decoder outputs and the two flip-flop outputs, one AND-gate producing a logic 1 output to request pixel prerounding and the other AND-gate producing a logic 0 output to request pixel postrounding, and (vi) a second multiplexer which has first - (prerounding) and second (postrounding) inputs connected respectively to the outputs of the two AND-gates, and an output which is connected to a switching input of the first multiplexer, said second multiplexer being switched at pixel clock rate to connect its output to its prerounding input for the first half of each pixel priod and to connect its output to its postrounding input for the second half of each pixel period, a resultant switching signal at the second multiplexer output switching the first multiplexer so as to connect an output thereof to its first input when the switching signal is at logic 1 value and to its second input when the switching signal is at logic 0 value.
Claim 13
Dependent Claim
265 words
A pixel rounding circuit as claimed in Claim 10, said input means having a line store connected to receive and store the digital codes for each scanning line of pixels read from the display memory, this line store being driven at pixel clock rate so as to produce at its output the stored digital codes delayed by one scan line period, the input means also including a third multiplexer having first and second inputs connected to receive the digital codes for the current scanning line as read from the display memory and third and fourth inputs connected to receive the digital codes as produced at the output of the line store, the third multiplexer being switched so that for the first occurrence of the current scanning line its first input is connected to a first output thereof to provide the digital codes from the line store as the fundamental pixel information and its third input is connected to a second output thereof to provide the digital codes from the line store as the reference pixel information, whereas for the second occurrence of the current scanning line the fourth input of the third multiplexer is connected to the first output to provide the digital codes from the line store as the fundamental pixel information while its second input is connected to the second output to provide the digital codes for the current scanning line as the reference pixel information, the rounding circuit receiving the digital codes for the second occurrence of the current scanning line of pixel information with an advance of one line scan period.
Claim 14
Dependent Claim
28 words
A raster scan display device comprising a circuit as claimed in any of Claims 10, 11, 12 and comprising a display element fed by said pixel rounding circuit.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.