Process for making a contact arrangement for a semiconductor device

Claim 2

A process for use in fabricating a semiconductor device comprising the steps of: forming on a substrate an insulating layer having an opening portion, and forming on said insulating layer a nucleating layer which becomes a seed for growth of a metal or a metal silicide, said nucleating layer having a predetermined pattern which has an edge along at least a part of an edge of said opening portion of said insulating layer; and selectively growing a metal or a metal silicide on said substrate in said opening portion of said insulating layer, and on said nucleating layer, to form a metal or a metal silicide layer which has said predetermined pattern-of said nucleating layer and which is in contact with said substrate.

Claim 3

A process according to claim 1, wherein said substrate is a semiconductor.

Claim 4

A process according to claim 1 or 2, wherein said nucleating layer is a semiconductor.

Claim 5

A process according to claim 1, wherein said substrate is a metal.

Claim 6

A process according to any preceding claim, wherein said metal or metal silicide layer is an electrode.

Claim 7

A process according to claim 5, wherein said metal or metal silicide layer is a base taking-out electrode of a bipolar transistor.

Claim 8

A process according to claim 5, wherein said metal or metal silicide layer is a source or drain taking-out electrode of an MOS transistor.

Claim 9

A process according to any preceding claim, wherein said metal or metal silicide layer is a wiring layer.

Claim 10

A process for fabricating a semiconductor device comprising the steps of: a) providing a structure having a semiconductor substrate of a first conductivity type, and first and second insulating layers on said semiconductor substrate, said first insulating layer being shaped as an island, said second insulating layer being spaced from said first insulating layer through an opening portion surrounding said first insulating layer, said second insulating layer extending outwardly from the outer periphery of said opening portion; forming on said second insulating layer a nucleating layer,-which becomes a nucleus for growth of a metal or metal silicide and has a predetermined pattern extending outwardly from the outer periphery of said opening portion; and also forming a base contact region of a second conductive type opposite to the first conductivity type, provided on said semiconductor substrate adjacent to its principal surface below said opening portion, b) selectively growing a metal or a metal silicide on said base contact region exposed below said opening portion and on said nucleating layer, to form a base taking-out electrode having said predetermined pattern on said second insulating layer and in contact with said base contact region, c) forming a third insulating layer on an exposed surface of said base taking-out electrode, d) forming an active base region of the second conductivity type and an emitter region of the first conductivity type in said semiconductor substrate below a region surrounded by said base taking-out electrode and said third insulating layer from the principal surface into the inside thereof, said active base region being in contact with said base contact region, said emitter region being in said active base region, and e) using a region of the first conductivity type in said semiconductor layer and in contact with said active base region as a collector region.

Claim 11

A process for fabricating a semiconductor device comprising the steps of: a) providing a structure having a semiconductor substrate of a first conductivity type, and first and second insulating layers on said semiconductor substrate, said first insulating layer being shaped as an island, said second insulating layer being spaced from said first insulating layer through an opening portion surrounding said first insulating layer, said second insulating layer extending outwardly from the outer periphery of said opening portion; forming on said second insulating layer a nucleating layer,-which becomes a nucleus for growth of a metal or metal silicide and has a predetermined pattern extending outwardly from the outer periphery of said opening portion; and also forming a base contact region of a second conductive type opposite to the first conductivity type, provided on said semiconductor substrate adjacent to its principal surface below said opening portion, b) selectively growing a metal or a metal silicide on said base contact region exposed below said opening portion and on said nucleating layer, to form a base taking-out electrode having said predetermined pattern on said second insulating layer and in contact with said base contact region, c) forming a third insulating layer on an exposed surface of said base taking-out electrode, d) forming an active base region of the second conductivity type and an emitter region of the first conductivity type in said semiconductor substrate below a region surrounded by said base taking-out electrode and said third insulating layer from the principal surface into the inside thereof, said active base region being in contact with said base contact region, said emitter region being in said active base region, and e) using a region of the first conductivity type in said semiconductor layer and in contact with said active base region as a collector region.

Claim 12

A semiconductor device, fabricated by a method including a process according to any one of the preceding claims.