EP0199635A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Integrated circuit device having stacked conductive layers connecting circuit elements therethrough
Assignee: Fujitsu Ltd
•
Filing: 1986-04-11
•
Granted: —
•
Expires: 2006-04-11
Abstract
Abstract An integrated circuit (IC) device including a stacked layer unit (11) having a plurality of stacked ayers (11-1 to 11-6) each having an insulation layer (11-1b to 11-6b) and at least one conductive layer strip (11-1 a to 11-6a) formed on a surface of the nsulation layer, and at least one ship (3) mounted on the top of the insulation layer and having a plurality of circuit elements. The IC device also includes at least one first conductive member (13) formed in the stacked layer unit, having a low inductance for first signals applied thereto and operatively connecting the first signals to be transferred between the circuit elements; at least one second conductive member (14) formed in the stacked layer unit, having a higher inductance for the first signals than that of the first conductive member and operatively connecting second signals to be transferred between the circuit elements ; and, a package (21 to 24) enclosing the stacked layer unit, the chip, and the first and second conductive members, with a hermetic seal.
Inventors
- 👤 Akira Miyauchi
- 👤 Hiroshi C/O Suzuki Nishimoto
- 👤 Tadashi Okiyama
- 👤 Hiroo Kitasagami
- 👤 Masahiro Sugimoto
- 👤 Haruo Tamada
- 👤 Shinji Emori
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 16:31
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/18; H05K1/182; H05K1/184; H05K1/02; H05K1/0213; H05K1/0237; H05K1/0243; H10; H10W; H10W44/00; H10W44/501; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W70/685; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/157; H05K2201/00; H05K2201/10; H05K2201/10227; H05K2201/10265; H05K2201/10409; H05K2201/10613; H05K2201/10621; H05K2201/10689; H05K3/00; H05K3/30; H05K3/32; H05K3/325; H05K3/40; H05K3/4038; H05K3/4046; H10W72/00; H10W72/071; H10W72/075; H10W72/07551; H10W72/07552; H10W72/07553; H10W72/50; H10W72/521; H10W72/527; H10W72/531; H10W72/537; H10W72/541; H10W72/5445; H10W90/00; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
185 words
An integrated circuit device comprising: a stacked layer means (11) including a plurality of stacked layers (11-1 to 11-6) each having an insulation layer (11-1b to 11-6b) and at least one conductive layer strip (11-1 a to 11-6a) formed on a surface insulation layer ; at least one chip (3) mounted on said insulation layer (11-1b) of said stacked layers (11-1 to 11-6) in said stacked layer means (11) and including a 10 plurality of circuit elements; first conductive means (13) formed in said stacked layer means (11) having a low inductance for first signals applied thereto and operatively connecting said first signals to be transferred between said circuit elements in said chip (3); second conductive means (14) formed in said stacked layer means (11), having a higher inductance for said first signals than that of said first conductive means (13) and operatively connecting second signals to be transferred between said circuit elements in said chip (3); and package means (21 to 24) enclosing said stacked layer means (11), said chip (3) and said first (13) and second (14) conductive means with a hermetic seal.
Claim 2
Dependent Claim
185 words
An integrated circuit device comprising: a stacked layer means (11) including a plurality of stacked layers (11-1 to 11-6) each having an insulation layer (11-1b to 11-6b) and at least one conductive layer strip (11-1 a to 11-6a) formed on a surface insulation layer ; at least one chip (3) mounted on said insulation layer (11-1b) of said stacked layers (11-1 to 11-6) in said stacked layer means (11) and including a 10 plurality of circuit elements; first conductive means (13) formed in said stacked layer means (11) having a low inductance for first signals applied thereto and operatively connecting said first signals to be transferred between said circuit elements in said chip (3); second conductive means (14) formed in said stacked layer means (11), having a higher inductance for said first signals than that of said first conductive means (13) and operatively connecting second signals to be transferred between said circuit elements in said chip (3); and package means (21 to 24) enclosing said stacked layer means (11), said chip (3) and said first (13) and second (14) conductive means with a hermetic seal.
Claim 3
Dependent Claim
41 words
An integrated circuit device according to claim 1, wherein said first signals transferred through said first conductive means (13) are high frequency signals and said second signals transferred through said second conductive means (14) are low frequency signals or power supplies.
Claim 4
Dependent Claim
70 words
An integrated circuit device according to claim 2, wherein each of said first (13) and second (14) conductive means comprises a viahole(s) (12-1 to 12-3) formed in said insulation layer(s) (11-1b,...) of said stacked layer means (11) and operatively connected to one of said conductive layer strips (11-1a) at any stacked layer or two conductive layer strips (11-1 a) placed on different insulation layers - (11-1b) at an end(s) thereof.
Claim 5
Dependent Claim
34 words
An integrated circuit device according to claim 3, wherein each of said first conductive means (13) has a large cross-sectional area and each of said second conductive means (14) has a small cross-sectional area.
Claim 6
Dependent Claim
24 words
An integrated circuit device according to claim 4, wherein said first (13) and second (14) conductive means are formed of the same conductive material.
Claim 7
Dependent Claim
36 words
An integrated circuit device according to claim 5, wherein said cross-sectional area of said each first conductive means (13) is defined in such a way that a predetermined low inductance is obtained for said first signal.
Claim 8
Dependent Claim
36 words
An integrated circuit device according to claim 6, wherein said cross-sectional area of said each second conductive means (14) is defined in such a way that a predetermined high inductance is obtained for said first signal.
Claim 9
Dependent Claim
45 words
An integrated circuit device according to claim 3, wherein each of said first conductive means (13) has a short length along an axial line of said viahole (12-1 to 12-3) and each of said second conductive means has a long length along said axial line.
Claim 10
Dependent Claim
24 words
An integrated circuit device according to claim 8, wherein said first (13) and second (14) conductive means are formed of the same conductive material.
Claim 11
Dependent Claim
37 words
An integrated circuit device according to claim 9, wherein said short length of each of said first conductive means (13) is defined in such a way that a predetermined low inductance is obtained for said first signal.
Claim 12
Dependent Claim
37 words
An integrated circuit device according to claim 10, wherein said long length of each of said second conductive means (14) is defined in such a way that a predetermined high inductance is obtained for said first signal.
Claim 13
Dependent Claim
58 words
An integrated circuit device according to claim 3, wherein each of said first conductive means - (13) has a large cross-sectional area and a short length along an axial line of said viahole (12-1 to 12-3), and each of said second conductive means - (14) has a small cross-sectional area and a long length along said axial line.
Claim 14
Dependent Claim
25 words
An integrated circuit device according to claim 12, wherein said first (13) and second (14) conduc- five means are formed of the same conductive material.
Claim 15
Dependent Claim
41 words
An integrated circuit device according to claim 13, wherein said short length and large cross-sectional area of each of said first conductive means (13) are defined in such a way that a predetermined low inductance is obtained for said first signal.
Claim 16
Dependent Claim
41 words
An integrated circuit device according to claim 14, wherein said long length and small cross-sectional area of each of said second conductive means (14) are defined in such a way that a predetermined high inductance is obtained for said first signal.
Claim 17
Dependent Claim
28 words
An integrated circuit device according to claim 3, wherein said second conductive means (14) comprise coil(s) inserted in a throughhole(s) (12-1 to 12-3) and having a high inductance.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.