← Back to Patent Explorer
EP0198446A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Semiconductor device with short-length electrode and fabrication process therefor

Assignee: International Business Machines Corp
•
Filing: 1986-04-11
•
Granted: —
•
Expires: 2006-04-11
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device (Field Effect Transistor) is fabricated by coating a wafer with oxygen impervious silicon nitride and thereafter oxidising an exposed surface. By vertically etching the oxide layer by means of reactive ion etching, an oxide abutment or bird-beak (24) is formed with a perpendicular wall (40) and sloping roof (42). By depositing an electrically conductive conformal layer (46) of thickness equal to a desired electrode length and then vertically etching this conductive layer, an electrode (16) of short length is left on the perpendicular wall (40) of the abutment or bird-beak (24). I Source and drain regions (12 and 14) are formed by ion implantation adjacent the abutment or bird-beak (24) joined by a charge conduction channel - (50) which is partially constricted due to the doping profile produced by the varying thickness of the oxide layer to establish a predetermined resistance and protection from avalanche breakdown.

Inventors

  • 👤 Frank Fu Fang
  • 👤 Bertrand M. Grossman

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 00:02
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/0133; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0163; H10D84/02; H10D84/03; H10D84/038; H10P; H10P76/00; H10P76/40; H10P76/408; H10P76/4085; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/512; H10D64/513; Y; Y10; Y10S; Y10S148/00; Y10S148/122

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 168 words
A process for fabricating a semiconductor device comprising covering a portion of a surface of a substrate (26) of semiconductor material with an oxygen-impervious layer (30) leaving an exposed area where an electrode (16) is to be formed, oxidising the exposed area to form an oxide of the semiconductor material with the edge of the layer - (30) to raise due to the formation of oxide thereunder, characterised in the further steps of directionally etching away exposed portions of the oxide to leave an abutment (24) of oxide having a wall - (40) substantially perpendicular to the surface of the substrate, removing the layer (30) from said substrate (26) and abutment (24), re-oxidising the substrate to form a re-oxidised layer (44), deporting a conformal layer (46) of electrically conductive material over said re-oxidised layer (44) to a thickness equal to the desired length of said electrode - (16), and directionally etching said conductive layer (46) to leave the electrode (16) on the wall (40) of the abutment (24).
Claim 2
Dependent Claim 168 words
A process for fabricating a semiconductor device comprising covering a portion of a surface of a substrate (26) of semiconductor material with an oxygen-impervious layer (30) leaving an exposed area where an electrode (16) is to be formed, oxidising the exposed area to form an oxide of the semiconductor material with the edge of the layer - (30) to raise due to the formation of oxide thereunder, characterised in the further steps of directionally etching away exposed portions of the oxide to leave an abutment (24) of oxide having a wall - (40) substantially perpendicular to the surface of the substrate, removing the layer (30) from said substrate (26) and abutment (24), re-oxidising the substrate to form a re-oxidised layer (44), deporting a conformal layer (46) of electrically conductive material over said re-oxidised layer (44) to a thickness equal to the desired length of said electrode - (16), and directionally etching said conductive layer (46) to leave the electrode (16) on the wall (40) of the abutment (24).
Claim 3
Dependent Claim 41 words
A process as claimed in claim 1, further including doping a surface region of said substrate (26) to a predetermined depth profile (48) to provide a charge conduction band (50) which is partially constricted at one side of said abutment (24).
Claim 4
Dependent Claim 17 words
A process as claimed in claim 2, in which said doping step is accomplished by ion implantation.
Claim 5
Dependent Claim 24 words
A process as claimed in any preceding claim, in which at least one of said directional etching steps is accomplished by reactive ion etching.
Claim 6
Dependent Claim 36 words
A process as claimed in any preceding claim in which the substrate is of silicon, in which the oxygen impervious layer in the silicon nitride and in which the conductive layer is of doped polycrystalline silicon.
Claim 7
Dependent Claim 84 words
A semiconductor device comprising a semiconductor substrate (26), an oxide insulating layer (44) formed on the surface thereof and having an electrode formed on said oxide layer (44), and is characterised in that the oxide layer (44) has an abutment (24) formed therein with a wall (40) extending substantially perpendicular to the surface and a sloping roof (42) connected to the upper edge of the wall, and in that the electrode (16) is formed on the vertical wall (40) of the abutment - (24).
Claim 8
Dependent Claim 84 words
A semiconductor device comprising a semiconductor substrate (26), an oxide insulating layer (44) formed on the surface thereof and having an electrode formed on said oxide layer (44), and is characterised in that the oxide layer (44) has an abutment (24) formed therein with a wall (40) extending substantially perpendicular to the surface and a sloping roof (42) connected to the upper edge of the wall, and in that the electrode (16) is formed on the vertical wall (40) of the abutment - (24).
Claim 9
Dependent Claim 55 words
A semiconductor device as claimed in claim 6, in which a dopant is disposed within said substrate (26) beneath said oxide layer (44) with a doping profile rising into said abutment partially to constrict a charge conduction channel (50) formed beneath the oxide layer (44) thereby to provide a predetermined resistance and protection from avalanche.
Claim 10
Dependent Claim 49 words
A device as claimed in claim 7 in the form of a field-effect transistor comprising a drain region (14) formed at the side of said abutment (24) adjacent said sloping roof (42) and a source region (12) formed at the side of said abutment (24) adjacent said perpendicular wall.
Claim 11
Dependent Claim 33 words
A device as claimed in claim 8, in which the substrate is of one conductivity type (N or P) and the source and drain regions are of opposite conductivity type (P or N).
Claim 12
Independent Claim 39 words
A device as claimed in any one of claims 6 to 9, in which the substrate (26) is of silicon, the abutment (24) and oxide layer (44) are of silicon dioxide, and the electrode is of doped polycrystalline silicon.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag