Video signal processing apparatus

Claim 2

A video signal processing apparatus comprising: a delay circuit (3) for delaying an input signal by a predetermined time; a first operational circuit (4) for conducting an addition or substraction operation between an output signal of said delay circuit and an input video signal; a nonlinear processing circuit (9) which receives an output signal of said first operational circuit (4) and generates first and second output signals, the first output signal having a gain of K that decreases with an increase of the absolute value of the level of the output signal of said first operational circuit and becomes zero when said absolute value exceeds a specified value, the second output signal having a gain of 1/2 (1 + K); a second operational circuit (1) tor conducting an addition or subtraction operation between said first output signal of said nonlinear processing circuit (9) and said input video signal and outputting the operation result to the input of said delay circuit (3); and a third operational circuit (6) for conducting an addition or subtraction operation between said second output signal of said nonlinear processing circuit (9) and said input video signal.

Claim 3

Apparatus as claimed in claim 1, wherein said delay circuit (3) delays the input signal by 1H or 2H (H: horizontal synchronization period).

Claim 4

Apparatus according to claim 1 or 2, wherein the nonlinear processing circuit (9) comprises a first nonlinear circuit (8) that receives an output signal of said first operational circuit (4) and has a gain of K which decreases with an increase of the absolute value of the level of the output signal of said first operational circuit and becomes zero when said absolute value exceeds a specified value; and a second nonlinear processing circuit (5) that receives the output signal of said first operational circuit (4) and has a gain of 1/2 (1 + K).

Claim 5

Apparatus as claimed in claim 1, 2 or 3, wherein said input video signal is a carrier chrominance signal modulated by a chrominance sub-carrier.

Claim 6

Apparatus as claimed in claim 1, 2 or 3, wherein said input video signal is a chrominance difference signal demodulated in the basic band or a luminance signal.

Claim 7

A video signal processing apparatus comprising: a delay circuit (3) for delaying an input signal by a predetermined time; a first operational circuit (4) for conducting an addition or subtraction operation between an output signal of said delay circuit and an input video signal; a nonlinear processing circuit (12) that receives an output signal of said first operational circuit (4) and has a gain which decreases with an increase of the absolute value of the level of the output signal of said first operational circuit and becomes zero when said absolute value exceeds a specified value; a second operational circuit (2) for conducting an addition or subtraction operation between an output signal of said nonlinear processing circuit (12) and said input video signal and outputting the operation result to the input of said delay circuit (3); an adder circuit (11) for adding the output signal of said nonlinear processing circuit (12) to the output signal of said first operational circuit (4); a coefficient circuit (13) for multiplying an output signal of said adder circuit by a predetermined coefficient; and a third operational circuit (6) for conducting an addition or subtraction operation between an output signal of said coefficient circuit and said input video signal.

Claim 8

A video signal processing apparatus comprising: a delay circuit (3) for delaying an input signal by a predetermined time; a first operational circuit (4) for conducting an addition or subtraction operation between an output signal of said delay circuit and an input video signal; a nonlinear processing circuit (12) that receives an output signal of said first operational circuit (4) and has a gain which decreases with an increase of the absolute value of the level of the output signal of said first operational circuit and becomes zero when said absolute value exceeds a specified value; a second operational circuit (2) for conducting an addition or subtraction operation between an output signal of said nonlinear processing circuit (12) and said input video signal and outputting the operation result to the input of said delay circuit (3); an adder circuit (11) for adding the output signal of said nonlinear processing circuit (12) to the output signal of said first operational circuit (4); a coefficient circuit (13) for multiplying an output signal of said adder circuit by a predetermined coefficient; and a third operational circuit (6) for conducting an addition or subtraction operation between an output signal of said coefficient circuit and said input video signal.

Claim 9

Apparatus as claimed in claim 6, wherein said delay circuit (3) delays the input signal by 1H or 2H (H: horizontal synchronization period).

Claim 10

The video signal processing apparatus as claimed in claim 6 or 7, wherein said coefficient of said coefficient circuit (13) is 1/2.

Claim 11

Apparatus as claimed in claim 6, 7, or 8, wherein said input video signal is a carrier chrominance signal modulated by a chrominance sub-carrier.

Claim 12

Apparatus as claimed in claim 6, 7 or 8, wherein said input video signal is a chrominance difference signal demodulated in the basic band or a luminance signal.