EP0197501A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Extended drain concept for reduced hot electron effect
Assignee: General Electric Co
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Filing: 1986-04-02
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Granted: —
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Expires: 2006-04-02
Abstract
Abstract Hot electron injection into the gate oxides of MOSFET devices imposes limitations on the miniaturization of such devices in VLSt circuits. A buried channel is provided to guard against hot electron trapping effects while preserving process and structure compatibility with micron or submicron VLSI devices. The channel current is redirected into a buried channel at a distance away from the interface in the vicinity of the drain region where the hot electron effect is most likely to occur. This redirection is effected by providing a buried, lightly doped region extending inwardly from the conventional source and drain implant profile regions.
Inventors
- 👤 Ching-Yeu Wei
- 👤 Joseph Maxwell Pimbley
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 11:08
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
164 words
A metal oxide semiconductor field effect transistor comprising: a semiconductor body doped with a first polarity dopant; an insulating layer disposed over a portion of said body; and an electrically conductive gate electrode disposed over said insulating layer so as to be electrically insulated from said semiconductor body; said semiconductor body having a source region heavily doped with a second polarity dopant and a drain region heavily doped with said second polarity dopant, said source and drain regions being disposed in said semiconductor body to a specified depth on either side of said gate electrode; and said semiconductor body also having a lightly doped protrusion extending from at least one of said source and drain regions, said light dopant being a second polarity dopant, said lightly doped protrusion being disposed beneath the surface of said semiconductor body and extending toward the region beneath said gate electrode, said lightly doped protrustion being spaced apart from the boundary between said semiconductor body and said insulating layer.
Claim 2
Dependent Claim
164 words
A metal oxide semiconductor field effect transistor comprising: a semiconductor body doped with a first polarity dopant; an insulating layer disposed over a portion of said body; and an electrically conductive gate electrode disposed over said insulating layer so as to be electrically insulated from said semiconductor body; said semiconductor body having a source region heavily doped with a second polarity dopant and a drain region heavily doped with said second polarity dopant, said source and drain regions being disposed in said semiconductor body to a specified depth on either side of said gate electrode; and said semiconductor body also having a lightly doped protrusion extending from at least one of said source and drain regions, said light dopant being a second polarity dopant, said lightly doped protrusion being disposed beneath the surface of said semiconductor body and extending toward the region beneath said gate electrode, said lightly doped protrustion being spaced apart from the boundary between said semiconductor body and said insulating layer.
Claim 3
Dependent Claim
29 words
The transistor of claim 1 in which a first lightly doped region portion extends from said source region and a second lightly doped region extends from said drain region.
Claim 4
Dependent Claim
16 words
The transistor of claim 1 further including side spacers on either side of said gate electrode.
Claim 5
Dependent Claim
18 words
The transistor of claim 3 in which said spacers are between approximately 0.1 and 0.2 microns in width.
Claim 6
Dependent Claim
28 words
The transistor of claim 2 in which said lightly doped protrusions extend outwardly from adjacent heavily doped portions for a distance of between approximately 0.1 and 0.2 microns.
Claim 7
Dependent Claim
27 words
The transistor of claim 2 in which said lightly doped protrusions are disposed approximately 1,000 angstroms below the interface between said insulating layer and said semiconductor body.
Claim 8
Dependent Claim
31 words
The transistor of claim 1 in which said heavily doped regions extend approximately from the surface of said semiconductor body to a depth of between approximately 1,500 and 4,000 angstroms therein.
Claim 9
Dependent Claim
24 words
The transistor of claim 1 in which said first polarity dopant comprises a p-type dopant and said second polarity dopant comprises an n-type dopant.
Claim 10
Dependent Claim
13 words
The transistor of claim 1 in which said transistor is an n-channel device.
Claim 11
Dependent Claim
22 words
The transistor of claim 1 in which said second polarity dopant comprises material selected from the group consisting of arsenic and phosphorous.
Claim 12
Dependent Claim
12 words
The transistor of claim 1 in which said semiconductor body comprises silicon.
Claim 13
Dependent Claim
20 words
The transistor of claim 1 in which said semiconductor body comprises an n-doped semiconductor substrate including a p-doped well therein.
Claim 14
Dependent Claim
13 words
The transistor of claim 1 in which said insulating layer comprises silicon oxide.
Claim 15
Dependent Claim
24 words
The transistor of claim 1 in which said electrically conductive gate comprises material selected from the group consisting of metals and doped polycrystalline silicon.
Claim 16
Dependent Claim
29 words
The transistor of claim 1 in which said heavily doped region is formed at an implant dosage of approximately 8 x 10 15 atoms of dopant per square centimeter.
Claim 17
Dependent Claim
30 words
The transistor of claim 1 in which said lightly doped regions are formed at an implant dosage of between approximately 10 12 and 10 14 dopant atoms per square centimeter.
References Cited (Backward Citations)
No citation records indexed.
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