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EP0195412A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Integrated circuit with built-in indicator of internal repair

Assignee: NEC Corp
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Filing: 1986-03-18
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Granted: —
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Expires: 2006-03-18
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Abstract

Abstract A circuit for providing an identification signal indicative of whether or not an semiconductor device has a repaired or replaced potion therein. The circuit is enabled by a control signal which is used for control the semiconductor device and causes a change in power supply current flowing into the semiconductor device according to presence or absence of the repaired or replaced portion.

Inventors

  • 👤 Takayuki Watanabe

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 21:28
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78; G11C29/835

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 158 words
A semiconductor device comprising a first voltage terminal receiving a first potential, a second voltage terminal receiving a second potential, a control terminal for receiving a control signal having first and second logic levels, a functional circuit operable with said first and second potential, said functional circuit being enabled when said control signal is at said first logic level, a redundant circuit, said redundant circuit being used to repair a defective portion if present in said a functional circuit, a first switching means, said first switching means assuming conducting state in response to said first logic level and non-conducting state otherwise, a programmable switching means, said programmable switching means assuming one of conductive and non-conducting states when said redundant circuit is used to repair said functional circuit and the other of the conductive and non-conductive state otherwise, and means for connecting said first switching means and programmable switching means in series between said first and second voltage terminals.
Claim 2
Dependent Claim 158 words
A semiconductor device comprising a first voltage terminal receiving a first potential, a second voltage terminal receiving a second potential, a control terminal for receiving a control signal having first and second logic levels, a functional circuit operable with said first and second potential, said functional circuit being enabled when said control signal is at said first logic level, a redundant circuit, said redundant circuit being used to repair a defective portion if present in said a functional circuit, a first switching means, said first switching means assuming conducting state in response to said first logic level and non-conducting state otherwise, a programmable switching means, said programmable switching means assuming one of conductive and non-conducting states when said redundant circuit is used to repair said functional circuit and the other of the conductive and non-conductive state otherwise, and means for connecting said first switching means and programmable switching means in series between said first and second voltage terminals.
Claim 3
Dependent Claim 30 words
The semiconductor device according to Claim 1, in which said functional circuit includes a memory circuit having a plurality of memory cell and said redundant circuit includes redundant memory cells.
Claim 4
Dependent Claim 35 words
The semiconductor device according to Claim 1, further comprising a second switching means connected in series with respect to said first and programmable switching means, said second switching means being controlled by an extemal signal.
Claim 5
Dependent Claim 58 words
The semiconductor device according to Claim t, in which said programmable switching means includes a first switch element having current path connected in series with respect to said first switching means, a read-only memory element for storing the state of said redundant cicruit and means for controlling said first switch element in response to said read-only memory element.
Claim 6
Dependent Claim 53 words
The semiconductor device according to Claim 2, in which said programmable switching means includes a first switch element having a current path connected in series with respect to said first switching means, and means for rendering said first switch element conductive when said at least one of said redundant memory cells is selected.

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