EP0194696A2
Expired / Lapsed
EP
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Multi processor system
Assignee: Sony Corp
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Filing: 1986-03-14
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Granted: —
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Expires: 2006-03-14
Abstract
Abstract Two or more processors (1, 2) with differing address space sizes are used in a multi-processor system. A portion of the memory means (6) accessible by the first processor (1) with a larger address space size is also accessible by the second processor (2) for elevating a utilization efficiency of the memory capacity. A window (101 ) for the memory space of the second processor (2) is provided in the address space of the first processor (1). The memory devices controlled by the second processor (2) are controlled through this window (101) by the first processor (1) as well as for elevating the utilization efficiency of the memory devices.
Inventors
- 👤 Yoshimasa C/O Sony Corporation Hosona
- 👤 Toshio C/O Sony Corporation Uno
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-26 11:02
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F12/00; G06F12/02; G06F12/0223; G06F12/0284
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
84 words
A multi-processor system, characterized in: first processor means (1) having a first address space, second processor means (2) having a second address space narrower than said first address space, memory means (6) having a memory capacity enough to be accessed by said first processor means (1), first means for accessing said memory means (6) by said first processor means (1), and second means for accessing a portion of memory means (6) allocated to said second processor means (2) by said second processor means (2).
Claim 2
Dependent Claim
84 words
A multi-processor system, characterized in: first processor means (1) having a first address space, second processor means (2) having a second address space narrower than said first address space, memory means (6) having a memory capacity enough to be accessed by said first processor means (1), first means for accessing said memory means (6) by said first processor means (1), and second means for accessing a portion of memory means (6) allocated to said second processor means (2) by said second processor means (2).
Claim 3
Dependent Claim
45 words
A multi-processor system according to claim 1, characterized in that said second accessing means comprises means for managing a plurality of memory slots which is accessible by said second processor means (2), said portion of memory means being one of said plurality of memory slots.
Claim 4
Dependent Claim
47 words
A multi-processor system according to claim 2, characterized in that each of said memory slots is divided into a plurality of page areas and a predetermined set of page areas in respective memory slots are selected in accordance with a request of said second processor means (2).
Claim 5
Dependent Claim
34 words
A multi-processor system according to claim 3, characterized in that said second processor means (2) further comprises a programmable peripheral interface (23-30) for producing said request to determine a selection of said page areas.
Claim 6
Dependent Claim
111 words
A multi-processor system according to any one of claims 1 to 4, characterized in that said memory means (6) is controlled by a first control signal from said first processor means (1) through a first control bus (11) and said portion (100) of memory means (6) is controlled by a second control signal from said second processor means (2) through a second control bus (12), and in that said first accessing means comprises means (3) connected between said first and second control buses (11, 12) for converting said first control signal into said second control signal to access said portion (100) of memory means (6) by said first processor means (1).
Claim 7
Dependent Claim
33 words
A multi-processor system according to claim 5, characterized in that said first accessing means further comprises additional means (3) for accessing a plurality of memory slots managed by said second processor means (2).
Claim 8
Dependent Claim
40 words
A multi-processor system according to claim 6, characterized in that said additional means is provided with a window area (101) which defines corresponding information to said second address space in said first address space of said first processor means (1).
Claim 9
Dependent Claim
153 words
A multi-processor system, characterized in first processor means (1) having a first address space, second processor means (2) having a second address space narrower than said first address space, first read only memory (4) connected with said first processor means (1) for controlling the operating system of said first processor means (1), second read only memory (21) connected with said second processor means (2) for controlling the operating system of said second processor means (2), random access memory (6) connected with said first and second processor means (1, 2) for storing data therein, said random access memory (6) having a memory capacity enough to be accessed by said first processor means (1), first means for accessing said random access memory (6) by said first processor means (1), and second means for accessing a portion of said random access memory (6) allocated to said second processor means (2) by said second processor means (2).
Claim 10
Dependent Claim
153 words
A multi-processor system, characterized in first processor means (1) having a first address space, second processor means (2) having a second address space narrower than said first address space, first read only memory (4) connected with said first processor means (1) for controlling the operating system of said first processor means (1), second read only memory (21) connected with said second processor means (2) for controlling the operating system of said second processor means (2), random access memory (6) connected with said first and second processor means (1, 2) for storing data therein, said random access memory (6) having a memory capacity enough to be accessed by said first processor means (1), first means for accessing said random access memory (6) by said first processor means (1), and second means for accessing a portion of said random access memory (6) allocated to said second processor means (2) by said second processor means (2).
Claim 11
Dependent Claim
108 words
A multi-processor system according to claim 8, characterized in that said random access memory (6) is controlled " by a frist control signal from said first processor means (1) through a first control bus (11) and said portion of random access memory (6) is controlled by a second control signal from said second processor means (2) through a second control bus (12), and in that said first accessing means comprises means (3) connected between said first and second control buses (11, 12) for converting said first control signal into said second control signal to access said portion of random access memory (6) by said first processor means (1).
Claim 12
Dependent Claim
64 words
A multi-processor system according to claim 9, characterized in that said second read only memory (21) and said random access memory (6) compose a plurality of memory slots, each of which is accessible by said second processor means (2), and in that said first accessing means further comprises additional means for accessing said plurality of memory slots managed by said second processor means (2).
Claim 13
Dependent Claim
41 words
A multi-processor system according to claim 10, characterized in that said additional accessing means is provided with a window area (101) which defines corresponding information to said second address space in said first address space of said first processor means (1).
References Cited (Backward Citations)
No citation records indexed.
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