EP0194660A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Electronic postage meter having a memory map decoder and an illegal-memory-access warning signal, respectively
Assignee: Pitney Bowes Inc
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Filing: 1986-03-12
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Granted: —
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Expires: 2006-03-12
Abstract
Abstract An electronic postage meter having an improved memory selection circuit (CPU) is disclosed. A custom memory map decoder circuit which resolution down to a single byte location is used to provide selection enabling signals to insure the selection of an appropriate device only when the addresses appropriate to that device are communicated. A warning signal is provided whenever an attempt is made to access an illegal or unused address.
Inventors
- 👤 Peter C. Digiulio
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 17:54
CPC Classifications
G; G07; G07B; G07B17/00; G07B17/00185; G07B17/00362; G07B17/00193; G07B2017/00258; G07B2017/00395; G07B2017/00403
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
81 words
An electronic postage meter having a microprocessor (CPU) for controlling the printing of value and for accounting for the printing of such value, nonvolatile memory (NVM) for storage of the accounting data, the control being in accordance with a program stored in another memory (PM), characterized by selection means for selecting only the particular memory means whenever the appropriate addresses for that memory are selected and no other whereby data may be read from or written into only the selected memory.
Claim 2
Dependent Claim
81 words
An electronic postage meter having a microprocessor (CPU) for controlling the printing of value and for accounting for the printing of such value, nonvolatile memory (NVM) for storage of the accounting data, the control being in accordance with a program stored in another memory (PM), characterized by selection means for selecting only the particular memory means whenever the appropriate addresses for that memory are selected and no other whereby data may be read from or written into only the selected memory.
Claim 3
Dependent Claim
22 words
The postage meter of claim 1, wherein there are additional signals which are decoded to assure that the appropriate memory is selected.
Claim 4
Dependent Claim
75 words
An electronic postage meter having a microprocessor (CPU) and at least one memory device (NVM) and circuit block, said memory device and circuit block being accessible by the microcprocessor (CPU) in accordance with a plurality of addresses respectively associated with each device and block, characterized by means (10, 38) for providing a warning signal whenever there occurs attempts to access an address which is not associated with any of said memory devices and circuit blocks.
Claim 5
Dependent Claim
75 words
An electronic postage meter having a microprocessor (CPU) and at least one memory device (NVM) and circuit block, said memory device and circuit block being accessible by the microcprocessor (CPU) in accordance with a plurality of addresses respectively associated with each device and block, characterized by means (10, 38) for providing a warning signal whenever there occurs attempts to access an address which is not associated with any of said memory devices and circuit blocks.
Claim 6
Dependent Claim
33 words
The postage meter of claim 3, wherein the means for providing the interrupt signal includes means for holding the interrupt signal in an active state until reset by an output from the microprocessor.
References Cited (Backward Citations)
No citation records indexed.
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