EP0193842A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Integrated semiconductor circuit with two epitaxial layers of different conductivity types
Assignee: International Business Machines Corp
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Filing: 1986-02-25
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Granted: —
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Expires: 2006-02-25
Abstract
Abstract An integrated semiconductor circuit comprises an inner layer (2) of semiconductor material of one conductivity type contiguous with a substrate layer (3) of semiconductor material of the opposite conductivity type and an outer layer (1) of semiconductor material of the opposite conductivity type contiguous with the inner layer. There are a first ohmic contact (6) to a first region of the outer layer, a second ohmic contact (8) to a first region of the inner layer, and a third common ohmic contact (9) to both a second region of the outer layer and a second region of the inner layer. Control means (12) varies conduction between the first and second regions of the outer layer whereby conduction between the first and second regions of the inner layer is varied.
Inventors
- 👤 Marc Herbert Brodsky
- 👤 Frank Fu Fang
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-04 14:16
CPC Classifications
H; H10; H10B; H10B10/00; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/05; H10D88/00
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
137 words
An integrated semiconductor circuit comprising an inner layer (2) of semiconductor material of one conductivity type contiguous with a substrate layer (3) of semiconductor material of the opposite conductivity type and an outer layer (1) of semiconductor material of the opposite conductivity type contiguous with the inner layer, a first ohmic contact (6) to a first region of the outer layer, a second ohmic contact (8) to a first region of the inner layer, a third common ohmic contact (9) to both a second region of the outer layer and a second region of the inner layer, the second regions being displaced from the first regions, and control means (12) to vary conduction between the first and second region of the outer layer whereby conduction between the first and second regions of the inner layer is varied.
Claim 2
Dependent Claim
137 words
An integrated semiconductor circuit comprising an inner layer (2) of semiconductor material of one conductivity type contiguous with a substrate layer (3) of semiconductor material of the opposite conductivity type and an outer layer (1) of semiconductor material of the opposite conductivity type contiguous with the inner layer, a first ohmic contact (6) to a first region of the outer layer, a second ohmic contact (8) to a first region of the inner layer, a third common ohmic contact (9) to both a second region of the outer layer and a second region of the inner layer, the second regions being displaced from the first regions, and control means (12) to vary conduction between the first and second region of the outer layer whereby conduction between the first and second regions of the inner layer is varied.
Claim 3
Dependent Claim
70 words
An integrated circuit as claimed in claim 1, in which the first and second regions and the portion therebetween of the outer layer and the control means form a control device, the first and second regions and the portion therebetween of the inner layer form a load device, and the third common ohmic contact forms an output terminal for the circuit comprised by the control device and the load device.
Claim 4
Dependent Claim
26 words
An integrated circuit as claimed in claim 2, wherein said control device is an enhancement mode FET and said load device is a depletion mode FET,
Claim 5
Dependent Claim
22 words
An integrated circuit as claimed in claim 2, wherein said control device is a MOSFET and said load device is a JFET.
Claim 6
Dependent Claim
14 words
An integrated circuit as claimed in any preceding claim, formed in a silicon crystal.
Claim 7
Dependent Claim
35 words
An integrated circuit as claimed in claim 4, wherein the control device is an enhancement mode MOSFET and the load device is a depletion mode JFET, the control and load devices forming an inverter circuit.
Claim 8
Dependent Claim
33 words
An integrated circuit as claimed in any preceding claim, in which the outer layer is of p-type silicon, the inner layer is of n-type silicon and the substrate layer is of p-type silicon.
Claim 9
Dependent Claim
20 words
An integrated circuit as claimed in any claims 1 to 5, formed in a group III-V intermetallic compound semiconductor crystal.
Claim 10
Dependent Claim
31 words
An integrated circuit as claimed in claim 7, in which the outer layer is of p-type GaAs, the inner layer is of n-type GaAs and the substrate layer is of GaAs.
Claim 11
Dependent Claim
46 words
A symmetrical circuit structure including first and second integrated circuits each as claimed in any preceding claim, formed in a common monolithic semiconductor crystal the first and second integrated circuits being disposed on opposite sides of superimposed common ohmic contacts to the outer and inner layers.
References Cited (Backward Citations)
No citation records indexed.
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