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EP0189180A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Ultrasonic bloodstream diagnostic apparatus with dual displays of velocity profiles and average flow velocity

Assignee: Panasonic Holdings Corp
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Filing: 1986-01-22
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Granted: —
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Expires: 2006-01-22
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Abstract

Abstract Disclosed is an ultrasonic bloodstream diagnostic apparatus wherein the frequencies of Doppler shift ultrasound information are analyzed by a frequency analyzer to derive a power spectrum represented by N-bit data. Data compression technique is employed to convert the N-bit data to (M + L)-bit output data having M and L output bits. The M output bits respectively correspond to those of M bits in the N-bit data which are preceded by a series of K binary 0's, and the M output bits have a binary 1 in the most significant bit position thereof. The L output bits represent the least significant bit position of the M output bits with respect to the least significant bit position of the N-bit data, where K ranges from zero to N - M, and (M+L) is smaller than N. A microprocessor derives a signal representing the average frequency of the power spectrum from the (M + L)-bit output data. The (M + L)-bit output data is converted by a conversion memory to a form suitable for display by an algorithm which reconverts it to N-bits and nonlinearly compresses the latter by a logarithmic function.

Inventors

  • 👤 Yoshihiro Hayakawa
  • 👤 Yasuhiro Nakamura
  • 👤 Masami Kawabuchi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-07 13:55
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/52; G01S7/52017; G01S7/52053; G01S7/52057; G01S7/52074; G01S15/00; G01S15/88; G01S15/89; G01S15/8906; G01S15/8979

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 193 words
A circuit for processing ultrasonic information carrying Doppler frequency shifts which indicate the flow velocity of bloodstream, comprising: a frequency analyzer for analyzing the frequencies of said received information; power spectrum deriving means for deriving from the output of said frequency analyzer N-bit data representing the power spectrum of said Doppler frequency shifts; data compression means for converting said N-bit data to (M+L)-bit output data having M output bits and L output bits, the M output bits respectively corresponding to those of M bits in said N-bit data which are preceded by a series of K binary 0's, said M output bits having a binary 1 in the most significant bit position thereof, and said L output bits representing the least significant bit position of said M output bits with respect to the least significant bit position of said N-bit data, where K ranges from zero to N - M, and (M + L) is smaller than N; averaging means for deriving a signal representing the average frequency of said power spectrum from said (M+L)-bit output data; and data conversion means for converting said (M+L)-bit output data to significant data to be displayed.
Claim 2
Dependent Claim 193 words
A circuit for processing ultrasonic information carrying Doppler frequency shifts which indicate the flow velocity of bloodstream, comprising: a frequency analyzer for analyzing the frequencies of said received information; power spectrum deriving means for deriving from the output of said frequency analyzer N-bit data representing the power spectrum of said Doppler frequency shifts; data compression means for converting said N-bit data to (M+L)-bit output data having M output bits and L output bits, the M output bits respectively corresponding to those of M bits in said N-bit data which are preceded by a series of K binary 0's, said M output bits having a binary 1 in the most significant bit position thereof, and said L output bits representing the least significant bit position of said M output bits with respect to the least significant bit position of said N-bit data, where K ranges from zero to N - M, and (M + L) is smaller than N; averaging means for deriving a signal representing the average frequency of said power spectrum from said (M+L)-bit output data; and data conversion means for converting said (M+L)-bit output data to significant data to be displayed.
Claim 3
Dependent Claim 29 words
A circuit as claimed in claim 1, wherein said data compression means comprises a memory storing said (M+L)-bit data in locations addressible as a function of said N-bit data.
Claim 4
Dependent Claim 71 words
A circuit as claimed in claim 2, wherein said data conversion means comprises a second memory storing data which correspond to a replica of the N-bit data which would be derived in correspondence to said (M+L)-bit output data, said replica being converted to the last-mentioned stored data according to a logarithmic function, the data in said second memory being stored in locations addressible as a function of said (M+L)-bit output data.
Claim 5
Dependent Claim 86 words
A circuit as claimed in claim 2, wherein said power spectrum deriving means includes means for squaring the output of caid frequency analyzer, the squared value of the analyzer output being represented by N' bits which include said N-bit data plus insignificant bits in positions higher than the N-bit data and insignificant bits in positions lower than the N-bit data, and further comprising means for detecting a binary 1 in one of said higher positions for causing said memory to generate (M+L)-bit data of maximum value.
Claim 6
Dependent Claim 289 words
An ultrasonic bloodstream diagnostic apparatus comprising: an ultrasonic probe for examining a patient's blood stream; transmit/receive circuit means for exciting said probe to transmit ultrasonic energy from said probe into the ; patient body and receiving ultrasonic signals returning from tissues of said patient; quadrature phase detector means for deriving phase quadrature signals from said received ultrasonic signals; analog-to-digital converter means for digitizing said phase quadrature signals; a frequency analyzer for analyzing the frequencies of said digitized signals; squaring means for squaring each of said digitized signals; adder means for summing the squared digitized signals and generating N-bit power spectrum data; data compression means for converting said N-bit data to (M+L)-bit output data having M output bits and L output bits, the M output bits respectively corresponding to those of M bits in said N-bit data which are preceded by a series of K binary 0's, said M output bits having a binary 1 in the most significant bit position thereof, and said L output bits representing the least significant bit position of said M output bits with respect to the least significant bit position of said N-bit data, where K ranges from zero to N - M, and (M + L) is smaller than N; averaging means for deriving a signal representing the average frequency of said power spectrum from said (M+L)-bit output data and deriving therefrom a signal representing the average speed of the patient's blood stream; data conversion means for converting the (M+L)-bit output data to significant data to be displayed; digital-to-analog converter means for converting said sigificant data to an analog signal; and monitor means for providing a display of the analog signal in a raster scan format and a display of said average speed.
Claim 7
Dependent Claim 289 words
An ultrasonic bloodstream diagnostic apparatus comprising: an ultrasonic probe for examining a patient's blood stream; transmit/receive circuit means for exciting said probe to transmit ultrasonic energy from said probe into the ; patient body and receiving ultrasonic signals returning from tissues of said patient; quadrature phase detector means for deriving phase quadrature signals from said received ultrasonic signals; analog-to-digital converter means for digitizing said phase quadrature signals; a frequency analyzer for analyzing the frequencies of said digitized signals; squaring means for squaring each of said digitized signals; adder means for summing the squared digitized signals and generating N-bit power spectrum data; data compression means for converting said N-bit data to (M+L)-bit output data having M output bits and L output bits, the M output bits respectively corresponding to those of M bits in said N-bit data which are preceded by a series of K binary 0's, said M output bits having a binary 1 in the most significant bit position thereof, and said L output bits representing the least significant bit position of said M output bits with respect to the least significant bit position of said N-bit data, where K ranges from zero to N - M, and (M + L) is smaller than N; averaging means for deriving a signal representing the average frequency of said power spectrum from said (M+L)-bit output data and deriving therefrom a signal representing the average speed of the patient's blood stream; data conversion means for converting the (M+L)-bit output data to significant data to be displayed; digital-to-analog converter means for converting said sigificant data to an analog signal; and monitor means for providing a display of the analog signal in a raster scan format and a display of said average speed.
Claim 8
Dependent Claim 22 words
An ultrasonic bloodstream diagnostic apparatus as claimed in claim 5, wherein said frequency analyzer provides fast courier transformation on said digitized signals.
Claim 9
Dependent Claim 33 words
An ultrasonic bloodstream diagnostic apparatus as claimed in claim 5, wherein said data compression means comprises a memory storing said (M+L)-bit output data in locations addressible as a function of said N-bit data.
Claim 10
Dependent Claim 72 words
An ultrasonic bloodstream diagnostic apparatus as claimed in claim 6, wherein said data conversion means comprises a second memory storing data which correspond to a replica of the N-bit data which would be derived in correspondence to said (M+L)-bit data, said replica being converted to the last-mentioned stored data according to a logarithmic function, the data in said second memory being stored in locations addressible as a function of said (M+L)-bit data.
Claim 11
Dependent Claim 74 words
An ultrasonic bloodstream diagnostic apparatus as claimed in claim 7, wherein the output of said adder is represented by N' bits which include said N-bit data plus insignificant bits in higher bit positions than the N-bit data and insigificant bits in bit positions lower than the N-bit data, and further comprising means for detecting a binary 1 in one of said higher positions for causing said memory to generate (M+L)-bit data of maximum value.

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